Data transfer control device and electronic instrument
First Claim
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1. A data transfer control device comprising:
- an ATA device-side interface which transfers data between the data transfer control device and an ATA host through a first ATA bus;
an ATA host-side interface which transfers data between the data transfer control device and an ATA device through a second ATA bus;
first to Nth device-side pads connected with first to Nth signal lines of the first ATA bus, the first to Nth device-side pads being pads for the device-side interface;
first to Nth host-side pads connected with first to Nth signal lines of the second ATA bus, the first to Nth host-side pads being pads for the host-side interface; and
a switching circuit including first to Nth switching elements which connect or disconnect signal lines from the first to Nth device-side pads and signal lines from the first to Nth host-side pads.
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Abstract
A data transfer control device includes an ATA device-side I/F which transfers data between the data transfer control device and an ATA host through a bus ATABUS1, an ATA host-side I/F which transfers data between the data transfer control device and an ATA host through a bus ATABUS2, device-side pads which are pads for the device-side I/F, host-side pads which are pads for the host-side I/F, and a switching circuit including switching elements which connect or disconnect signal lines from the device-side pads and signal lines from the host-side pads.
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Citations
20 Claims
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1. A data transfer control device comprising:
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an ATA device-side interface which transfers data between the data transfer control device and an ATA host through a first ATA bus;
an ATA host-side interface which transfers data between the data transfer control device and an ATA device through a second ATA bus;
first to Nth device-side pads connected with first to Nth signal lines of the first ATA bus, the first to Nth device-side pads being pads for the device-side interface;
first to Nth host-side pads connected with first to Nth signal lines of the second ATA bus, the first to Nth host-side pads being pads for the host-side interface; and
a switching circuit including first to Nth switching elements which connect or disconnect signal lines from the first to Nth device-side pads and signal lines from the first to Nth host-side pads. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification