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Fully buffered DIMM variable read latency

  • US 20070005922A1
  • Filed: 06/30/2005
  • Published: 01/04/2007
  • Est. Priority Date: 06/30/2005
  • Status: Abandoned Application
First Claim
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1. An apparatus comprising:

  • a storage to store a plurality of values, each of the plurality of values indicative of read latency for a memory device in a plurality of memory devices;

    a read request queue to store read requests; and

    read latency logic coupled to the storage and the read request queue to identify each set of received read data as matching to a read command to one of the plurality memory devices based on the plurality of values.

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