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Method and apparatus for securing and validating paged memory system

  • US 20070005935A1
  • Filed: 06/30/2005
  • Published: 01/04/2007
  • Est. Priority Date: 06/30/2005
  • Status: Abandoned Application
First Claim
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1. An apparatus comprising:

  • at least one host processor;

    at least one virtual memory support circuit;

    a service processor to monitor a state of the at least one virtual memory support circuit;

    a first memory accessible to every host processor and to the service processor; and

    a second memory accessible to the service processor only.

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