High voltage integrated circuit driver with a high voltage PMOS bootstrap diode emulator
First Claim
1. A high voltage circuit driver, comprising:
- a high side driver cell, operable to drive a gate of a high side power MOSFET;
a low side driver cell, operable to drive a gate of a low side power MOSFET;
a bootstrap circuit, coupled between an output node and a supply-voltage terminal of the high side driver cell;
a high voltage PMOS transistor, coupled between a first voltage source terminal and the bootstrap circuit, wherein the high voltage PMOS transistor is embedded in an N-isolation layer and is integrated with the driver cells;
a bootstrap control circuit, coupled to the high voltage PMOS transistor; and
a high side driver control circuit and a low side driver control circuit, coupled to the high side driver cell and the low side driver cell, respectively.
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Abstract
A high voltage circuit driver includes high and low side driver cells to drive a high and a low side power MOSFET, a bootstrap circuit to energize the high side driver cell, a high voltage PMOS transistor (HVPMOS) between a voltage source and the bootstrap circuit, wherein the HVPMOS is embedded in an N-isolation layer and is integrated with the driver cells. A bootstrap control circuit, for controlling the HVPMOS, includes a high voltage level shift stage, which can also be embedded in an N-isolation layer. The circuit driver is operated by switching the high side drive signal from high to low, the low side drive signal from low to high with a first delay, and a bootstrap control signal from high to low with an additional second delay. Also, the bootstrap capacitor is first charged by switching on the HVPMOS, and then it energizes the high side driver cell.
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Citations
20 Claims
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1. A high voltage circuit driver, comprising:
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a high side driver cell, operable to drive a gate of a high side power MOSFET;
a low side driver cell, operable to drive a gate of a low side power MOSFET;
a bootstrap circuit, coupled between an output node and a supply-voltage terminal of the high side driver cell;
a high voltage PMOS transistor, coupled between a first voltage source terminal and the bootstrap circuit, wherein the high voltage PMOS transistor is embedded in an N-isolation layer and is integrated with the driver cells;
a bootstrap control circuit, coupled to the high voltage PMOS transistor; and
a high side driver control circuit and a low side driver control circuit, coupled to the high side driver cell and the low side driver cell, respectively. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A controller of a high voltage driver,
the high voltage driver comprising: -
a high side power MOSFET, configured to be coupled between a power supply and an output node;
a low side power MOSFET, coupled between the output node and a ground;
a high side driver cell, coupled to a gate of the high side power MOSFET;
a low side driver cell, coupled to a gate of the low side power MOSFET;
a bootstrap circuit, coupled between the output node and a supply-voltage terminal of the high side driver cell; and
a high voltage PMOS transistor, coupled between a first voltage source and the bootstrap circuit;
the controller comprising;
a comparator;
a delay element, coupled to the comparator;
logic circuitry, a first input of the logic circuitry coupled to the delay element; and
a high voltage level shift stage, the output of the logic circuitry coupled into the high voltage level shift stage, the output of the high voltage level shift stage coupled to the high voltage PMOS transistor;
whereinthe high voltage level shift stage is embedded in an N-isolation layer and is integrated with the driver cells. - View Dependent Claims (16, 17)
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18. The controller of 15, wherein the high voltage PMOS transistor is embedded into an N-isolation layer.
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19. The method of operating a high voltage driver, the method comprising:
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switching a high side drive signal from high to low, applied to a high side driver cell of a converter;
switching a low side drive signal from low to high with a first delay, applied to a low side driver cell of the converter; and
switching a bootstrap control signal from high to low with a second delay, applied to a high voltage PMOS transistor, the PMOS transistor being embedded into an N-isolation layer and integrated with the driver cells, wherein;
the second delay is partially subsequent to the first delay. - View Dependent Claims (20)
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Specification