Semiconductor device having local interconnection layer and etch stopper pattern for preventing leakage of current
First Claim
1. A method for manufacturing a semiconductor device having a local interconnection layer, the method comprising:
- implanting impurity ions into a semiconductor substrate, on which an isolation layer and a gate pattern are formed, and forming a junction layer on the semiconductor substrate;
etching an etch stopper having at least one layer on the isolation layer and the junction layer and forming an etch stopper pattern for preventing the etching of the isolation layer;
etching an interlayer dielectric (ILD) layer on the junction layer, the gate pattern, and the etch stopper, and forming a contact hole on which a local interconnection layer is to be formed; and
forming the local interconnection layer by filling the contact hole with a conductive material.
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Abstract
A semiconductor device having a local interconnection layer and a method for manufacturing the same are provided. A local interconnection layer is formed in an interlayer dielectric (ILD) layer on an isolation layer and a junction layer, for covering a semiconductor substrate, the isolation layer, and a gate pattern. An etch stopper pattern having at least one layer for preventing the etching of the isolation layer is formed under the local interconnection layer. The etch stopper pattern having at least one layer for preventing the etching of the isolation layer can be included when forming the local interconnection layer, thereby preventing leakage current caused by the etching of the isolation layer, improving the electrical characteristics of a semiconductor device, and improving the yield of a process of manufacturing a semiconductor device.
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Citations
9 Claims
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1. A method for manufacturing a semiconductor device having a local interconnection layer, the method comprising:
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implanting impurity ions into a semiconductor substrate, on which an isolation layer and a gate pattern are formed, and forming a junction layer on the semiconductor substrate;
etching an etch stopper having at least one layer on the isolation layer and the junction layer and forming an etch stopper pattern for preventing the etching of the isolation layer;
etching an interlayer dielectric (ILD) layer on the junction layer, the gate pattern, and the etch stopper, and forming a contact hole on which a local interconnection layer is to be formed; and
forming the local interconnection layer by filling the contact hole with a conductive material. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification