BIPOLAR POWER TRANSISTOR AND RELATED INTEGRATED DEVICE WITH CLAMP MEANS OF THE COLLECTOR VOLTAGE
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Abstract
A bipolar power transistor does not include integration of a Zener diode electrically connected between the base and collector for limiting the collector voltage. The power transistor is formed in a substrate, and includes an equalization diffusion and an auxiliary diffusion forming a P-N junction along a perimeter of the substrate An equalization conduction layer is in contact with the equalization diffusion and the auxiliary diffusion for electrically shorting the P-N junction.
8 Citations
17 Claims
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1-2. -2. (canceled)
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3. A bipolar power transistor comprising:
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a substrate having a first type of conductivity;
a collector diffusion having the first type of conductivity on a back side of said substrate;
a first buried base region having a second type of conductivity on a front side of said substrate;
a first buried emitter region having the first type of conductivity in said first buried base region;
an epitaxial layer on said first buried base region, said first buried emitter region and said substrate;
a base contact diffusion and an emitter contact diffusion respectively having the second and first type of conductivities, and extending through said epitaxial layer for respectively contacting said first buried base region and said first buried emitter region;
an equalization diffusion having the first type of conductivity and extending through said epitaxial layer and contacting said substrate;
an auxiliary diffusion having the second type of conductivity and extending through said epitaxial layer and laterally spaced from said first base region, said auxiliary diffusion forming with said equalization diffusion a junction; and
an equalization conduction layer in contact with said equalization diffusion and said auxiliary diffusion for electrically shorting the junction. - View Dependent Claims (4, 5, 6, 7)
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8. An integrated monolithic power device comprising:
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at least one power transistor comprising a substrate having a first type of conductivity, a collector diffusion having the first type of conductivity on a back side of said substrate, a first buried base region having a second type of conductivity on a front side of said substrate, a first buried emitter region having the first type of conductivity in said first buried base region, an epitaxial layer on said first buried base region, said first buried emitter region and said substrate, a base contact diffusion and an emitter contact diffusion respectively having the second and first type of conductivities, and extending through said epitaxial layer for respectively contacting said first buried base region and said first buried emitter region; and
at least one device for clamping a collector voltage of said power transistor comprising an equalization diffusion having the first type of conductivity and extending through said epitaxial layer and contacting said substrate, an auxiliary diffusion having the second type of conductivity and extending through said epitaxial layer and laterally spaced from said first base region, said auxiliary diffusion forming with said equalization diffusion a junction, and an equalization conduction layer in contact with said equalization diffusion and said auxiliary diffusion for electrically shorting the junction. - View Dependent Claims (9, 10, 11, 12)
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13. A method for making a power transistor comprising:
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forming a collector diffusion having a first type of conductivity on a back side of a substrate having the first type of conductivity;
forming a first buried base region having a second type of conductivity on a front side of the substrate;
forming a first buried emitter region having the first type of conductivity in the first buried base region;
forming an epitaxial layer on the first buried base region, the first buried emitter region and the substrate;
forming a base contact diffusion and an emitter contact diffusion respectively having the second and first type of conductivities, and extending through the epitaxial layer for respectively contacting the first buried base region and the first buried emitter region;
forming an equalization diffusion having the first type of conductivity and extending through the epitaxial layer and contacting the substrate;
forming an auxiliary diffusion having the second type of conductivity and extending through the epitaxial layer and laterally spaced from the first base region, the auxiliary diffusion forming with the equalization diffusion a junction; and
forming an equalization conduction layer in contact with the equalization diffusion and the auxiliary diffusion for electrically shorting the junction. - View Dependent Claims (14, 15, 16, 17)
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Specification