Semiconductor device having an integrated, self-regulated PWM current and power limiter and method
First Claim
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1. A method, comprising:
- receiving an activation signal at a semiconductor device;
generating an output power signal at the semiconductor device in response to receiving the activation signal, the output power signal having a duty cycle;
providing the output power signal to a load, the output power signal providing power to the load, an amount of power provided to the load based on the duty cycle of the output power signal; and
adjusting the duty cycle of the output power signal using at least one of a current limiter and a power limiter integrated in the semiconductor device.
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Abstract
A method includes receiving an activation signal at a semiconductor device and generating an output power signal at the semiconductor device in response to receiving the activation signal. The output power signal has a duty cycle. The method also includes providing the output power signal to a load. The output power signal provides power to the load. An amount of power provided to the load is based on the duty cycle of the output power signal. In addition, the method includes adjusting the duty cycle of the output power signal using at least one of a current limiter and a power limiter integrated in the semiconductor device.
29 Citations
20 Claims
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1. A method, comprising:
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receiving an activation signal at a semiconductor device;
generating an output power signal at the semiconductor device in response to receiving the activation signal, the output power signal having a duty cycle;
providing the output power signal to a load, the output power signal providing power to the load, an amount of power provided to the load based on the duty cycle of the output power signal; and
adjusting the duty cycle of the output power signal using at least one of a current limiter and a power limiter integrated in the semiconductor device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A semiconductor device, comprising:
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an output power signal generator capable of generating an output power signal, the output power signal having a duty cycle and providing power to a load, an amount of power provided to the load based on the duty cycle of the output power signal;
a controller capable of causing the output power signal generator to generate the output power signal in response to receiving an activation signal; and
at least one of a current limiter and a power limiter capable of adjusting the duty cycle of the output power signal. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A system, comprising:
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a power supply capable of providing a supply voltage; and
a semiconductor device capable of;
generating an output power signal using the supply voltage in response to an activation signal, the output power signal having a duty cycle;
providing the output power signal to a load, an amount of power provided to the load based on the duty cycle of the output power signal; and
adjusting the duty cycle of the output power signal using at least one of a current limiter and a power limiter integrated in the semiconductor device. - View Dependent Claims (17, 18, 19, 20)
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Specification