APPARATUS FOR STACKING SEMICONDUCTOR CHIPS, METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING THE SAME AND SEMICONDUCTOR PACKAGE MANUFACTURED THEREBY

• US 20070018295A1
• Filed: 09/25/2006
• Published: 01/25/2007
• Est. Priority Date: 09/09/2003
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: KIM, Min-Ill, HWANG, Tae-Hoe, KIM, Dong-Kuk, HONG, Jae-Young, LEE, Chang-Cheol
• Granted Patent: US 7,374,966 B2
• Time in Patent Office: Days
• US Class Current: 257/678
• CPC Class Codes: H01L 21/67132 Apparatus for placing on an insulating substrate, e.g. tape
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/92247 the second connecting process involving a wire connector
• CPC Class Codes: H01L 2224/94 at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 24/94 at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: Y10T 156/1763 : Magazine stack directly contacting separate work

Abstract

The present invention relates to an apparatus for stacking semiconductor chips, a method for manufacturing a semiconductor package using the same and a semiconductor package manufactured thereby. The apparatus for stacking semiconductor chips may comprise two tables for supporting wafers, a picker for picking up semiconductor chips and a picker transfer unit for moving the picker vertically and horizontally. The method for manufacturing a semiconductor package using the same may allow easy and rapid stacking of semiconductor chips, thereby improving the productivity of semiconductor package manufacture. Further, a semiconductor chip having a relatively thick film is attached onto another semiconductor chip having a relatively thin film. The thicker semiconductor chip may protect the thinner semiconductor chip from faults such as chipping or warpage which may occur due to external shocks such as that caused by a picker, thereby improving the reliability of the package.

Claims

1. An apparatus for stacking semiconductor chips, the apparatus comprising:

a first table to support a first wafer including a plurality of first semiconductor chips;

a picker to pick up a first semiconductor chip;

a picker transfer unit to move the picker; and

a second table to support a second wafer including a plurality of second semiconductor chips.

2. The apparatus of claim 1, wherein the picker transfer unit can horizontally move the picker between the first table and second table.

3. The apparatus of claim 1, further comprising:

a first wafer transfer unit to load the first wafer on the first table; and

a second wafer transfer unit to load the second wafer on the second table.

4. A semiconductor package comprising:

a first semiconductor chip;

a second semiconductor chip set including at least one semiconductor chip;

a substrate having the second semiconductor chip set attached on a top surface;

solder balls formed on a bottom surface of the substrate; and

bonding wires electrically connecting the first semiconductor chip and the second semiconductor chip set to the substrate,

wherein the first semiconductor chip has a first chip height and a first chip area and the second semiconductor chip has a second chip height and a second chip area and a first ratio of the first chip area to the first chip height and a second ratio of the second chip area to the second chip height.

5. The package of claim 4, wherein the first ratio is between 100 mm and 1,000 mm and the second ratio is between 1,000 mm and 5,000 mm.

6. The package of claim 4, wherein the first chip height is larger than the second chip height.