Flux linked LC tank circuits forming distributed clock networks

• US 20070018740A1
• Filed: 07/19/2005
• Published: 01/25/2007
• Est. Priority Date: 07/19/2005
• Status: Active Grant

• Current Assignee: Intellectual Ventures Holding 81 LLC (Intellectual Ventures LLC)
• Original Assignee: LC Tank LLC
• Inventors: Gabara, Thaddeus
• Granted Patent: US 7,511,588 B2
• Time in Patent Office: Days
• US Class Current: 331/167
• CPC Class Codes: G06F 1/10 Distribution of clock signals , e.g. skew
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H03B 2200/0076 Power combination of several oscillators oscillating at the same frequency
• CPC Class Codes: H03B 5/1212 the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
• CPC Class Codes: H03B 5/1228 the amplifier comprising one or more field effect transistors
• CPC Class Codes: H03B 5/1243 the means comprising voltage variable capacitance diodes

Abstract

CMOS LC tank circuits and flux linkage between inductors can be used to distribute and propagate clock signals over the surface of a VLSI chip or processor. The tank circuit offers an adiabatic behavior that recycles the energy between the reactive elements and minimizes losses in a conventional sense. Flux linkage can be used to orchestrate a number of seemingly individual and distributed CMOS LC tank circuits to behave as one unit. In one example, the distribution of a 45° separated multi-phase balanced oscillations over the surface of die 1.6 cm×1.6 cm at 10 GHz is expected to dissipate under 10 W and offers a potential to significantly reduce the road map predictions of 100 W. Simulations of several CMOS tank circuits indicate that the power dissipation can be reduced an order of magnitude when compared to conventional techniques. A passive flux linkage, mechanical, and finite state machine technique of frequency adjustment of an oscillator are described.

Claims

1. A sinusoidal clock generation and distribution apparatus comprising;

one or more transformers where each transformer comprises at least two coils,

a surface distribution of two or more oscillator circuits on a substrate, wherein

the oscillator circuit comprises;

two transistors of one conductivity type cross coupled to each other,

at least one transformer,

at least one capacitor, and

a means of coupling the transformers, capacitors and cross coupled circuit to form the oscillator circuit, and

an interconnection network which couples the two or more oscillator circuits together.

2. The apparatus of claim 1 wherein;

the interconnection network comprises;

a flux linkage between one coil and at least one other coil.

3. The apparatus of claim 1 wherein;

the interconnection network comprises;

a flux linkage between an RF source and at least one coil.

4. The apparatus of claim 1 wherein;

the interconnection network comprises;

an electrical connection between one capacitor and at least one other capacitor.

5. The apparatus of claim 1 wherein;

at least one of the coils is located on a different substrate.

6. The apparatus of claim 1 where the oscillator circuit further comprising;

at least one adjustable capacitor.

7. The apparatus of claim 1 wherein;

the oscillator circuit further comprises;

two or more coils connected in parallel.

8. The apparatus of claim 7 wherein;

the coils encompass different surface regions of a substrate.

9. A sinusoidal multi-phase clock generation and distribution apparatus comprising;

one or more transformers where each transformer comprises at least two coils;

a surface distribution of two or more clock generation units, wherein

the clock generation unit comprises;

at least two oscillator circuits, wherein

the oscillator circuit comprises;

two transistors of one conductivity type cross coupled to each other,

 

at least one transformer,

 

at least one capacitor, and

a means of coupling the transformers, capacitors and cross coupled circuit to form the oscillator circuit;

a means of connecting the two or more oscillator circuits to generate a multi-phase clock, and

a global interconnection network, wherein

the global interconnection network couples the two or more clock generation units together.

10. The apparatus of claim 9 wherein;

the multi-phase clock is balanced.

11. The apparatus of claim 9 wherein;

the coils on the boundary of the surface distribution are modified from the initial value of inductance by a multiplication factor of (1+k) to satisfy the boundary condition of the apparatus.

12. The apparatus of claim 9 where the oscillator circuit further comprising;

at least one adjustable capacitor.

13. The apparatus of claim 9 wherein;

the global interconnection network comprises;

a flux linkage between one coil of the clock generation unit and another coil of another clock generation unit.

14. The apparatus of claim 13 wherein;

a clock phase associated with the one coil of the clock generation unit is the same clock phase associated with another coil of another clock generation unit.

15. A method of synchronizing a clock generation network comprising the steps of;

providing two or more oscillator circuits,

interconnecting the two or more oscillator circuits to exchange information,

utilizing the exchanged information to automatically self-align the clock signals generated by the two or more oscillator circuits, thereby

synchronizing the clock generation network.

16. The method according to claim 15, wherein

information is continuously exchanged to maintain synchronization.

17. The method according to claim 15, wherein

the oscillator circuits comprise;

a means for regeneration.

18. The method according to claim 15, wherein

the interconnection includes a electrical path.

19. The method according to claim 15, wherein

the interconnection includes a flux linkage path.

20. The method according to claim 15, wherein

the two or more oscillator circuits are similar.

21. The method according to claim 15, wherein

a startup circuit provides an initial energy to the network

22. A clock generating system comprising;

one or more transformers where each transformer comprises at least two coils,

two or more oscillator circuits, wherein

each oscillator circuit comprises;

at least one transformer, and

at least one capacitor,

a means of coupling the transformers and capacitors to form the oscillator circuit, and

an interconnection network, wherein

the interconnection network couples the two or more oscillator circuits together.

23. The system of claim 22 wherein;

the interconnection network comprises;

a flux linkage between one coil and at least one other coil.

24. The system of claim 22 wherein;

the interconnection network comprises;

a flux linkage between an RF source and at least one coil.

25. The system of claim 22 wherein;

the interconnection network comprises;

an electrical connection between one capacitor and at least one other capacitor.

26. The system of claim 22 wherein;

the oscillator circuit further comprises;

a regenerative circuit.

27. The system of claim 22 where the oscillator circuit further comprising;

at least one adjustable capacitor.

28. An apparatus for generating multiphase clock signals comprising;

one or more transformers where each transformer comprises at least two coils,

at least two oscillator circuits, wherein

components of the oscillator circuit comprise;

a regenerative circuit,

at least one coil, and

at least one capacitor,

a means of connecting the components to form the oscillator circuit, and

a means of connecting the two or more oscillator circuits to generate a multi-phase clock apparatus.

29. A clock oscillator network comprising;

two or more oscillator circuits,

at least one continuous path formed between all the oscillator circuits, wherein

the path comprises electrical and flux linkage components.