Transient voltage protection circuit boards and manufacturing methods

• US 20070019354A1
• Filed: 08/03/2006
• Published: 01/25/2007
• Est. Priority Date: 07/21/2005
• Status: Active Grant

• Current Assignee: Eaton Intelligent Power Limited (Eaton Corporation PLC.)
• Original Assignee: Cooper Technologies Company (Eaton Corporation PLC.)
• Inventors: Kamath, Hundi
• Granted Patent: US 7,612,976 B2
• Time in Patent Office: Days
• US Class Current: 361/118
• CPC Class Codes: H01C 1/146 the resistive element surrounding the terminal
• CPC Class Codes: H01C 7/12 Overvoltage protection resistors series resistors structurally associated with spark gaps H01T1/16
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H05K 1/0257 Overvoltage protection
• CPC Class Codes: H05K 1/0259 Electrostatic discharge [ESD] protection
• CPC Class Codes: H05K 1/167 incorporating printed resistors
• CPC Class Codes: H05K 2201/0738 Use of voltage responsive materials, e.g. voltage switchable dielectric or varistor materials
• CPC Class Codes: H05K 2201/09318 Core having one signal plane and one power plane
• CPC Class Codes: H05K 3/323 by applying an anisotropic conductive adhesive layer over an array of pads
• CPC Class Codes: H05K 3/4053 by thick-film techniques
• CPC Class Codes: H05K 3/4614 the electrical connections between the circuit boards being made during lamination

Abstract

Circuit boards including embedded transient voltage protection.

Claims

1. A transient voltage suppression device comprising:

a dielectric substrate layer defining a first major surface, a second major surface, and a plurality of holes extending therethrough; and

a variable impedance material substantially filling each of the plurality of holes in the substrate, wherein the variable impedance material exhibits a relatively high impedance when subjected to voltage and/or current up to a predetermined threshold value, and exhibits a relatively low impedance when subjected to voltage and/or current that exceeds the predetermined threshold, the variable impedance material defining a shunt current path through the holes when exhibiting the low impedance.

2. The device of claim 1, further comprising a transmission layer applied to the first major surface, the transmission layer being electrically conductive in a direction normal to the first major surface, and insulative in directions parallel to the plane of the first major surface.

3. The device of claim 1, wherein the transmission layer comprises a z-axis conductive adhesive.

4. The device of claim 1, further comprising a circuit layer defining a conductive path to the variable impedance material in the plurality of holes, the circuit layer extending over the transmission layer and the circuit layer being patterned to define a circuit on the transmission layer.

5. The device of claim 1, wherein the circuit layer is laminated to the substrate layer with the transmission layer therebetween.

6. The device of claim 4, wherein the circuit layer defines at least one contact pad, the contact pad located over at least one of the holes to establish electrical connection with the variable impedance material in the at least one hole.

7. The device of claim 1, further comprising a ground plane coupled to the substrate layer opposite the circuit layer.

8. The device of claim 7, wherein the ground plane is laminated to the substrate layer.

9. The device of claim 1, wherein the substrate layer is fabricated from a flexible material.

10. The device of claim 9, wherein the flexible material is selected from the group of a polyimide material, a liquid crystal polymer, or an equivalent material.

11. The device of claim 1, wherein the substrate layer is fabricated from a rigid material.

12. The device of claim 11, wherein the substrate is selected from the group of FR-4 board, phenolic, ceramic or equivalent material.

13. A transient voltage suppression circuit board, comprising:

a dielectric substrate layer defining a first major surface, a second major surface, and a plurality of spaced holes arranged in an array, the holes extending between the first major surface and the second major surface, each of the holes defining a receptacle for a variable impedance material;

a ground plane in direct contact with the second major surface of the dielectric substrate layer; and

a variable impedance material substantially filling each of the plurality of holes in the substrate, wherein the variable impedance material exhibits a relatively high impedance when subjected to voltage and/or current up to a predetermined threshold value, and exhibits a relatively low impedance when subjected to voltage and/or current that exceeds the predetermined threshold, the variable impedance material defining a shunt current path through the holes to the ground plane when exhibiting the low impedance.

14. The device of claim 13, further comprising a transmission layer applied to the first major surface, the transmission layer being electrically conductive in a direction normal to the first major surface, and insulative in the plane of the first major surface.

15. The device of claim 13, wherein the transmission layer comprises a z-axis conductive adhesive.

16. The device of claim 13, further comprising a circuit layer defining a conductive path to the variable impedance material in the plurality of holes, the circuit layer extending over the transmission layer and the circuit layer being patterned to define a circuit on the transmission layer.

17. The device of claim 13, wherein the circuit layer is laminated to the substrate layer with the transmission layer therebetween.

18. The device of claim 13, wherein the circuit layer defines at least one contact pad, the contact pad located over at least one of the holes to establish electrical connection with the variable impedance material in the at least one hole.

19. The device of claim 13, wherein the substrate layer is selected from the group of a polyimide material, a liquid crystal polymer, FR-4 board, phenolic, ceramic or equivalents thereof.

20. A circuit board having embedded transient voltage suppression, the circuit board comprising:

a dielectric substrate layer fabricated from a polyimide material, the substrate layer defining a first major surface, a second major surface, and a plurality of holes extending therethrough, each of the holes defining a receptacle for a variable impedance material;

a variable impedance material substantially filling each of the plurality of holes in the substrate, wherein the variable impedance material exhibits a relatively high impedance when subjected to voltage and/or current up to a predetermined threshold value, and exhibits a relatively low impedance when subjected to voltage and/or current that exceeds the predetermined threshold, the variable impedance material defining a shunt current path through the holes to the ground plane when exhibiting the low impedance;

a transmission layer extending over the first major surface and directly contacting the variable impedance material on the first major surface, the transmission layer being electrically conductive in a direction normal to the first major surface, and insulative in the plane of the first major surface; and

a ground plane laminated to the second major surface of the dielectric substrate layer and directly contacting the variable impedance material on the second major surface.

21. The device of claim 20, wherein the transmission layer comprises a z-axis conductive adhesive.

22. The device of claim 20, further comprising a circuit layer defining a conductive path to the variable impedance material in the plurality of holes, the circuit layer extending over the transmission layer and the circuit layer being patterned to define a circuit on the transmission layer.

23. The device of claim 20, wherein the circuit layer is laminated to the substrate layer with the transmission layer therebetween.

24. The device of claim 20, wherein the circuit layer defines at least one contact pad, the contact pad located over at least one of the holes to establish electrical connection with the variable impedance material in the at least one hole.

25. A method of fabricating a circuit board, the method comprising:

providing a dielectric substrate layer having an array of holes formed therethrough;

filling the holes with a variable impedance material;

forming a circuit pattern; and

connecting the circuit pattern to the variable impedance material in selected ones of the holes, thereby forming a shunt current path between the circuit pattern and the dielectric substrate via the selected ones of the holes.

26. The method of claim 25, further comprising providing a ground plane on one side of the dielectric substrate layer.

27. The method of claim 25 wherein providing the ground plane comprises laminating the ground plane to the dielectric substrate layer after the array of holes is formed.

28. The method of claim 25 wherein providing the ground plane comprises laminating the ground plane to the dielectric substrate before the array of holes is formed.

29. The method of claim 25, wherein providing a dielectric substrate layer comprises providing a polyimide substrate pre-laminated to a metal foil.

30. The method of claim 25, wherein providing a dielectric substrate layer comprises providing a rigid substrate material.

31. The method of claim 25, wherein providing a dielectric substrate layer comprises providing a flexible substrate material.

32. The method of claim 25, wherein connecting the circuit pattern comprises attaching a transmission layer to the substrate layer, the transmission layer extending between the substrate layer and the circuit pattern, the transmission layer being electrically conductive in a direction normal to the substrate layer and insulative in a plane parallel to the substrate layer.

33. The method of claim 32, wherein connecting the circuit pattern comprises applying a z-axis conductive adhesive to the substrate layer.

34. A circuit board comprising:

a dielectric substrate;

means for connecting to electrical ground, the means for connecting coupled to the substrate;

means for defining a circuit pattern on the substrate, the means for defining the circuit pattern coupled to the substrate opposite the means for connecting to electrical ground; and

variable impedance means, situated in the dielectric substrate, for establishing a plurality of shunt currents paths between the means for defining the circuit pattern and the means for connecting to electrical ground in response transient high voltage events.

35. The circuit board of claim 34, further comprising transmission means for conducting shunt current from the circuit pattern to the means for transient voltage suppression, without shorting of adjacent shunt current paths.

36. The circuit board of claim 34, wherein the transmission means is conductive in a first direction and insulative in a plane extending perpendicular to the first direction.

37. The circuit board of claim 34 wherein the substrate is selected from the group of a polyimide material, a liquid crystal polymer, FR-4 board, phenolic, ceramic or equivalents thereof.

38. The circuit board of claim 34, wherein the dielectric substrate is planar, the circuit board further comprising means for receiving the means for transient voltage suppression in the plane of the dielectric substrate.