Multi-threaded transmit transport engine for storage devices

• US 20070019636A1
• Filed: 06/30/2005
• Published: 01/25/2007
• Est. Priority Date: 06/30/2005
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Lau, Victor, Seto, Pak-lung
• Granted Patent: US 8,149,854 B2
• Time in Patent Office: Days
• US Class Current: 370/360
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices

Abstract

An embodiment of the present invention is a technique to process a plurality of I/O sequences associated with a storage device. A task context pre-fetch engine pre-fetches a task context from a task context memory based on a pre-fetch request. At least a multi-threaded transmit transport layer (T×TL) processes the plurality of I/O sequences from an I/O pool simultaneously. The multi-threaded T×TL generates the pre-fetch request and one or more frames from the plurality of I/O sequences. A switch fabric and controller routes the frame to a link layer associated with the storage device.

Claims

1. An apparatus comprising:

a task context pre-fetch engine to pre-fetch a task context from a task context memory based on a pre-fetch request;

a multi-threaded transmit transport layer (T×

TL) coupled to the task context pre-fetch engine to process a plurality of input/output (I/O) sequences from an I/O pool simultaneously, the multi-threaded T×

TL generating the pre-fetch request and a frame from the plurality of I/O sequences; and

a switch fabric/controller coupled to the multi-threaded T×

TL to route the frame to a link layer associated with a storage device.

2. The apparatus of claim 1 wherein the multi-threaded T×

TL comprises;

a transmit transport protocol engine (PE) to perform operations on the plurality of I/O sequences, the operations including generation of transmit data from the I/O sequences;

a frame queue coupled to the transmit transport PE to store frame information;

a direct memory access (DMA) engine coupled to the transmit transport PE to transfer data from a memory to a transmit data buffer based on a DMA descriptor; and

a framer coupled to the frame queue and the transmit data buffer to create the frame based on the frame information and to generate a frame transmit request to the switch fabric and controller.

3. The apparatus of claim 2 wherein the transmit transport PE comprises:

an I/O requester to request for an I/O sequence from an I/O sequence scheduler;

a pre-fetch requester to generate the pre-fetch request to the task context pre-fetch engine;

an I/O decision generator to generate an I/O handling decision based on the task context;

a DMA descriptor generator to create the DMA descriptor; and

a task context updater to update the task context.

4. The apparatus of claim 2 wherein the frame queue comprises:

a frame header queue to store a frame header for the transmit data; and

a frame data queue to store the transmit data.

5. The apparatus of claim 2 wherein the switch fabric/controller comprises:

a switch to connect the link layer and the at least multi-threaded T×

TL;

a link layer monitor to check link layer status to a remote node having a remote node address; and

a controller to control the switch using the frame transmit request and to transmit the frame to the remote node via the switch according to the status and the remote node address.

6. The apparatus of claim 3 wherein the I/O decision generator generates a decision to transmit a data frame and a decision to transmit a command frame.

7. A method comprising:

pre-fetching a task context from a task context memory based on a pre-fetch request using a task context pre-fetch engine;

processing a plurality of input/output (I/O) sequences from an I/O pool simultaneously using at least a multi-threaded transmit transport layer (T×

TL), the multi-threaded T×

TL generating the pre-fetch request and a frame from the plurality of I/O sequences; and

routing the frame to a link layer using a switch fabric/controller.

8. The method of claim 7 wherein processing the plurality of I/O sequences comprises:

performing operations on the plurality of I/O sequences, the operations including generation of transmit data from the I/O sequences;

storing frame information;

transferring data from a memory to a transmit data buffer based on a DMA descriptor;

creating one or more frames based on the frame information; and

generating a frame transmit request to the switch fabric/controller.

9. The method of claim 8 wherein performing operations comprises:

requesting for an I/O sequence from an I/O sequence scheduler;

generating the pre-fetch request to the task context pre-fetch engine;

generating an I/O handling decision based on the task context;

creating the DMA descriptor; and

updating the task context.

10. The method of claim 8 wherein storing the frame information comprises:

storing a frame header for the transmit data; and

storing the transmit data.

11. The method of claim 8 wherein routing the frame comprises:

connecting the link layer to the multi-threaded T×

TL using a switch;

checking link layer status to a remote node having a remote node address;

controlling the switch using the frame transmit request; and

transmitting the frame to the remote node via the switch according to the connection status and the remote node address.

12. The method of claim 9 wherein generating the I/O handling decision comprises generating a decision to transmit a data frame and a decision to transmit a command frame.

13. A system comprising:

a storage device interface to interface to a storage device;

an input/output sequence scheduler coupled to the storage device interface to schedule processing a plurality of input/output (I/O) sequences from an I/O pool associated with the storage device; and

a multi-threaded transmit transport engine (TTE) coupled to the storage device interface and the I/O sequence scheduler, the multi-threaded TIE comprising;

a task context pre-fetch engine to pre-fetch a task context from a task context memory based on a pre-fetch request,

a multi-threaded transmit transport layer (T×

TL) coupled to the task context pre-fetch engine to process the plurality of I/O sequences simultaneously, the multi-threaded T×

TL generating the pre-fetch request and a frame from the plurality of I/O sequences, and

a switch fabric/controller coupled to the multi-threaded T×

TL to route the frame to a link layer associated with the storage device.

14. The system of claim 13 wherein the multi-threaded T×

TL comprises;

a transmit transport protocol engine (PE) to perform operations on the plurality of I/O sequences, the operations including generation of transmit data from the I/O sequences;

a frame queue coupled to the transmit transport PE to store frame information;

a direct memory access (DMA) engine coupled to the transmit transport PE to transfer data from a memory to a transmit data buffer based on a DMA descriptor; and

a framer coupled to the frame queue and the transmit data buffer to create the frame based on the frame information and to generate a frame transmit request to the switch fabric and controller.

15. The system of claim 14 wherein the transmit transport PE comprises:

an I/O requester to request for an I/O sequence from the I/O sequence scheduler;

a pre-fetch requester to generate the pre-fetch request to the task context pre-fetch engine;

an I/O decision generator to generate an I/O handling decision based on the task context;

a DMA descriptor generator to create the DMA descriptor; and

a task context updater to update the task context.

16. The system of claim 14 wherein the frame queue comprises:

a frame header queue to store a frame header for the transmit data; and

a frame data queue to store the transmit data.

17. The system of claim 14 wherein the switch fabric controller comprises:

a switch to connect the link layer and the at least multi-threaded T×

TL;

a link layer monitor to check link layer status to a remote node having a remote node address; and

a controller to control the switch using the frame transmit request and to transmit the frame to the remote node via the switch according to the status and the remote node address.

18. The system of claim 15 wherein the I/O decision generator generates a decision to transmit a data frame and a decision to transmit a command frame.

19. The system of claim 13 wherein the I/O sequence scheduler comprises:

an assigner to assign an I/O sequence to the multi-threaded T×

TL based on a link layer status; and

a counter to keep track of number of threads executing for a remote node.

20. The system of claim 13 wherein the storage device is one of a Serial Attached Small Computer System Interface (SAS) device, a Fiber Channel (FC) device, a Serial Advanced Technology Attachment (SATA) device, an Internet Small Computer System Interface (ISCSI) device, and a Host Bus Adapter (HBA) device.