Data clock recovery system and method employing phase shifting related to lag or lead time
First Claim
Patent Images
1. A data clock recovery system, comprising:
- a phase detector configured to produce a first signal indicating whether a data clock lags or leads a preferred phase in relation to an input data stream; and
a phase controller configured to process the first signal to shift a phase of the data clock toward the preferred phase at a rate positively related to a length of time the data clock lags or leads the preferred phase.
1 Assignment
0 Petitions
Accused Products
Abstract
A data clock recovery system is provided. A phase detector is configured to produce a first signal indicating whether a data clock lags or leads a preferred phase of the data clock in relation to an input data stream. A phase controller is configured to process the first signal to shift a phase of the data clock toward the preferred phase at a rate positively related to a length of time the data clock lags or leads the preferred phase.
-
Citations
37 Claims
-
1. A data clock recovery system, comprising:
-
a phase detector configured to produce a first signal indicating whether a data clock lags or leads a preferred phase in relation to an input data stream; and
a phase controller configured to process the first signal to shift a phase of the data clock toward the preferred phase at a rate positively related to a length of time the data clock lags or leads the preferred phase. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
-
-
14. A method for recovering data clock information from a communication signal, the method comprising:
-
generating a first signal indicating whether a data clock lags or leads a preferred phase in relation to an input data stream;
advancing a phase of the data clock at a rate positively related to a first length of time the first signal indicates the data clock lags the preferred phase; and
delaying the phase of the data clock at a rate positively related to a second length of time the first signal indicates the data clock leads the preferred phase. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
-
-
27. A data clock recovery system, comprising:
-
means for generating a first signal indicating whether a data clock lags or leads a preferred phase in relation to an input data stream; and
means for shifting a phase of the data clock toward the preferred phase at a rate that is positively related to a length of time the first signal indicates the data clock leads or lags the preferred phase. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34, 35, 36, 37)
-
Specification