Method for manufacturing semiconductor optical device using inductive coupled plasma-enhance CVD

• US 20070020954A1
• Filed: 07/18/2006
• Published: 01/25/2007
• Est. Priority Date: 07/19/2005
• Status: Active Grant

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Hattori, Tetsuya, Nomaguchi, Toshio
• Granted Patent: US 7,871,840 B2
• Time in Patent Office: Days
• US Class Current: 438/778
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/3145 formed by deposition from a gas or vapour
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/31616 Deposition of Al2O3
• CPC Class Codes: H01L 21/31637 Deposition of Tantalum oxides, e.g. Ta2O5
• CPC Class Codes: H01L 21/3185 of siliconnitrides

Abstract

The present invention provides a semiconductor laser diode prevents not only the adhesion of the upper electrode but the heat dissipation of the mesa from degrading. The laser diode includes a substrate, portion of which forms a mesa including an active layer, an insulating layer formed so as to bury the mesa, and an electrode formed on the mesa and the insulating layer. This insulating layer may be selected from SiO₂, SiON, SiN, Al₂O₃ or ZrO₂ and formed by the inductive coupling plasma-enhanced chemical vapor deposition (ICP-CVD) technique.

Claims

1. A method for manufacturing a semiconductor layer diode with a semiconductor substrate, a plurality of semiconductor layers, and an electrode, the semiconductor layers including an active layer and a contact layer in uppermost thereof, the method comprising steps of:

(a) forming the semiconductor layers on the semiconductor substrate;

(b) forming a mesa including the contact layer, the active layer, and a portion of the semiconductor substrate by etching;

(c) burying the mesa with an insulating layer.; and

(d) forming an electrode on the insulating layer,

wherein the insulating layer is formed by the inductive coupling plasma enhanced chemical vapor deposition technique.

2. The manufacturing method according to claim 1, wherein the insulating layer is made of a material selected from SiO₂, SiN, SiON, Al₂O₃ or ZrO₂.

3. The manufacturing method according to claim 1, further including, between steps (c) and (d), a step for etching the insulating layer so as to make a surface thereof planar.

4. The manufacturing method according to claim 1, further including, between steps (b) and (c), a step for forming another insulating layer on side surfaces of the mesa and on the semiconductor substrate, and, between steps (c) and (d), a step for etching the insulating layer and the other insulating layer to expose a top of the mesa.

5. A method for manufacturing a semiconductor layer diode with a semiconductor substrate, a series of layers made of compound semiconductor materials, a contact layer, and an electrode, the semiconductor layers including an active layer, the method comprising steps of:

(a) forming the semiconductor layers on the semiconductor substrate;

(b) forming a mesa including an active layer by etching the semiconductor layers and a portion of the semiconductor substrate;

,

(c) forming buried layers each made of a compound semiconductor material to bury the mesa;

(d) etching the buried layers and a portion of the semiconductor substrate so as to form a pair of trenches putting the mesa therebetween;

(e) burying the trench with an insulating layer; and

(f) forming an electrode on the insulating layer,

wherein the insulating layer is formed by the inductive coupling plasma enhanced chemical vapor deposition.

6. The manufacturing method according to claim 5, wherein the insulating layer is made of a material selected from SiO₂, SiN, SiON, Al₂O₃ or ZrO₂.

7. The manufacturing method according to claim 5, further including, between steps (e) and (f), a step of etching the insulating layer so as to make a surface of the insulating layer planar.

8. The manufacturing method according to claim 5,

further including, between steps (d) and (e), a step for forming another insulating layer on a top of the mesa and on a surface of the buried layer, and, between steps (e) and (f), a step of etching the insulating layer and the other insulating layer to expose a top of the mesa.

9. The manufacturing method according to claim 8,

wherein the other insulating layer is made of SiO₂ formed by the atmospheric chemical vapor deposition.