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Lock sequencing

  • US 20070022429A1
  • Filed: 07/25/2005
  • Published: 01/25/2007
  • Est. Priority Date: 07/25/2005
  • Status: Active Grant
First Claim
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1. A processor, comprising:

  • multiple programmable units integrated on a single die, each of the multiple programmable units to provide multiple program threads of execution; and

    circuitry integrated on the die, communicatively coupled to the multiple programmable units, the circuitry to reorder and grant lock requests received from the threads provided by the multiple programmable units based on an order in which the threads requested insertion into a sequence of lock grants.

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