Semiconductor device

• US 20070023750A1
• Filed: 10/04/2006
• Published: 02/01/2007
• Est. Priority Date: 03/12/2004
• Status: Active Grant

• Current Assignee: David Hong, Hai Chiang, John Wager, Nicole Dehuff, Randy Hoffman
• Original Assignee: David Hong, Hai Chiang, John Wager, Nicole Dehuff, Randy Hoffman
• Inventors: Hong, David, Hoffman, Randy, Chiang, Hai, Wager, John, Dehuff, Nicole
• Granted Patent: US 7,626,201 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A semiconductor device can include a channel including a zinc-indium oxide film.

Claims

1. A semiconductor device comprising:

a drain electrode;

a source electrode;

a channel contacting the drain electrode and the source electrode, wherein the channel includes zinc-indium oxide in the form of Zn_xIn_2yO_x+3y;

a gate electrode; and

a gate dielectric positioned between the gate electrode and the channel.

2. The semiconductor device of claim 1, wherein the zinc-indium oxide includes a single-phase crystalline state of Zn_xIn_2yO_x+3y, wherein values for x and y are each independently in the range of about 1 to about 15.

3. The semiconductor device of claim 1, wherein values for either x and y each include a plurality of values, wherein the zinc-indium oxide has a mixed-phase crystalline state.

4. The semiconductor device of claim 1, wherein the zinc-indium oxide in the form of Zn_xIn_2yO_x+3y has an amorphous form.

5. The semiconductor device of claim 1, wherein the channel includes being positioned between and electrically coupling the drain electrode and the source electrode.

6. The semiconductor device of claim 1, wherein at least one of the drain electrode, the source electrode, the channel, the gate electrode, and the gate dielectric is substantially transparent.

7. A semiconductor device comprising:

a drain electrode;

a source electrode;

a channel contacting the drain electrode and the source electrode, wherein the channel includes zinc-indium oxide formed from compounds selected from a group consisting of ZnO, Zn_xIn_2yO_x+3y, In₂O₃, and mixtures thereof;

a gate electrode; and

a gate dielectric positioned between the gate electrode and the channel.

8. The semiconductor device of claim 7, wherein the channel includes zinc-indium oxide having a mixed-phase crystalline state formed from compounds selected from the group consisting of ZnO, Zn_xIn_2yO_x+3y, In₂O₃, and mixtures thereof.

9. The semiconductor device of claim 7, wherein the channel includes zinc-indium oxide having an amorphous form from compounds selected from the group consisting of ZnO, Zn_xIn_2yO_x+3y, In₂O₃, and mixtures thereof.

10. The semiconductor device of claim 7, wherein zinc-indium oxide includes ZnO:

Zn_xIn_2yO_x+3y;

In₂O₃ in a ratio of A;

B;

C, wherein A, B, and C are each in a range of about 0.025 to about 0.95.

11. The semiconductor device of claim 7, wherein zinc-indium oxide includes an atomic composition of zinc and indium in a ratio of zinc(x):

indium(1-x), wherein x is in the range of about 0.05 to about 0.95.

12. A display device, comprising:

a plurality of pixel devices configured to operate collectively to display images, where each of the pixel devices includes a semiconductor device configured to control light emitted by the pixel device, the semiconductor device including;

a drain electrode;

a source electrode;

a channel contacting the drain electrode and the source electrode, wherein the channel includes zinc-indium oxide in the form of Zn_xIn_2yO_x+3y;

a gate electrode; and

a gate dielectric positioned between the gate electrode and the channel and configured to permit application of an electric field to the channel.

13. The display device of claim 12, wherein the zinc-indium oxide includes a single-phase crystalline state of Zn_xIn_2yO_x+3y, wherein values for x and y are each independently in the range of about 1 to about 15.

14. The display device of claim 12, wherein values for either x and y each include a plurality of values, wherein the zinc-indium oxide has a mixed-phase crystalline state.

15. The display device of claim 12, wherein the zinc-indium oxide in the form of Zn_xIn_2yO_x+3y has an amorphous form.

16. A display device comprising:

a plurality of pixel devices configured to operate collectively to display images, where each of the pixel devices includes a semiconductor device configured to control light emitted by the pixel device, the semiconductor device including;

a drain electrode;

a source electrode;

a channel contacting the drain electrode and the source electrode, wherein the channel includes zinc-indium oxide formed from compounds selected from the group consisting of ZnO, Zn_xIn_2yO_x+3y, In₂O₃, and mixtures thereof;

a gate electrode; and

a gate dielectric positioned between the gate electrode and the channel and configured to permit application of an electric field to the channel.

17. The display device of claim 16, wherein the channel includes zinc-indium oxide having a mixed-phase crystalline state formed from compounds selected from the group consisting of ZnO, Zn_xIn_2yO_x+3y, In₂O₃, and mixtures thereof.

18. The display device of claim 16, wherein the channel includes zinc-indium oxide having an amorphous form from compounds selected from the group consisting of ZnO, Zn_xIn_2yO_X+3y, In₂O₃, and mixtures thereof.

19. The display device of claim 16, wherein zinc-indium oxide includes ZnO:

Zn_xIn_2yO_x+3y;

In₂O₃ in a ratio of A;

B;

C, wherein A, B, and C are each in a range of about 0.025 to about 0.95.

20. The display device of claim 16, wherein zinc-indium oxide includes an atomic composition of zinc and indium in a ratio of zinc(x):

indium(1-x), wherein x is in the range of about 0.05 to about 0.95.