Semiconductor device
First Claim
1. A semiconductor device comprising:
- an inverter circuit including a first inverter and a second inverter for holding a data;
a ground line connected to the first inverter and the second inverter; and
at least one of a transistor, a resistor, and a capacitor connected to an output portion of the first inverter or an output portion of the second inverter, and the ground line.
1 Assignment
0 Petitions
Accused Products
Abstract
A cache memory having valid bits, where a circuit configuration in a memory cell of a valid bit is improved so as to perform invalidation at high speed. The invention provides a cache memory including a memory cell that has a function to perform invalidation at high speed. One mode of the invention is a semiconductor device including a memory cell of a valid bit, where two inverters are connected in series to form a loop, a drain of an N-channel transistor is connected to an output signal line of one of the inverters, a gate thereof is connected to a reset signal line of a CPU, and a source thereof is connected to a ground line. The initial value of the memory cell is determined by inputting a reset signal of the CPU to the gate.
21 Citations
34 Claims
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1. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a ground line connected to the first inverter and the second inverter; and
at least one of a transistor, a resistor, and a capacitor connected to an output portion of the first inverter or an output portion of the second inverter, and the ground line. - View Dependent Claims (2)
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3. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a word line connected to gate electrodes of the first transistor and the second transistor;
a ground line connected to the first inverter and the second inverter; and
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the first inverter or an output portion of the second inverter, and the ground line. - View Dependent Claims (4)
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5. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a power supply line connected to the first inverter and the second inverter; and
a transistor connected to an output portion of the first inverter or an output portion of the second inverter, and the power supply line. - View Dependent Claims (6)
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7. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter; and
a third transistor connected to an output portion of the first inverter or an output portion of the second inverter, and the power supply line. - View Dependent Claims (8)
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9. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter; and
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the first inverter or an output portion of the second inverter, and the ground line. - View Dependent Claims (10)
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11. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter; and
a third transistor connected to an output portion of the first inverter or an output portion of the second inverter, and the power supply line. - View Dependent Claims (12)
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13. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a first data line connected to the first transistor;
a second transistor connected to an input terminal of the second inverter;
a second data line connected to the second transistor;
a word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter; and
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the first inverter or an output portion of the second inverter, and the ground line. - View Dependent Claims (14)
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15. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a first data line connected to the first transistor;
a second transistor connected to an input terminal of the second inverter;
a second data line connected to the second transistor;
a word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter; and
a third transistor connected to an output portion of the first inverter or an output portion of the second inverter, and the power supply line. - View Dependent Claims (16)
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17. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a word line connected to gate electrodes of the first transistor and the second transistor;
a ground line connected to the first inverter and the second inverter;
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the first inverter and the ground line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to an output portion of the second inverter;
a fifth transistor connected to the fourth transistor; and
a data line connected to the fifth transistor. - View Dependent Claims (18)
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19. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a word line connected to gate electrodes of the first transistor and the second transistor;
a ground line connected to the first inverter and the second inverter;
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the second inverter and the ground line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to an output portion of the first inverter;
a fifth transistor connected to the fourth transistor; and
a data line connected to the fifth transistor. - View Dependent Claims (20)
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21. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter;
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the first inverter and the ground line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to an output portion of the second inverter;
a fifth transistor connected to the fourth transistor; and
a data line connected to the fifth transistor. - View Dependent Claims (22)
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23. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter;
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the second inverter and the ground line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to an output portion of the first inverter;
a fifth transistor connected to the fourth transistor; and
a data line connected to the fifth transistor. - View Dependent Claims (24)
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25. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a first word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter;
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the first inverter and the ground line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to an output portion of the second inverter;
a fifth transistor connected to the fourth transistor;
a second word line connected to a gate electrode of the fifth transistor; and
a data line connected to the fifth transistor. - View Dependent Claims (26)
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27. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a second transistor connected to an input terminal of the second inverter;
a first word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter;
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the second inverter and the ground line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to an output portion of the first inverter;
a fifth transistor connected to the fourth transistor;
a second word line connected to a gate electrode of the fifth transistor; and
a data line connected to the fifth transistor. - View Dependent Claims (28)
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29. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a first data line connected to the first transistor;
a second transistor connected to an input terminal of the second inverter;
a second data line connected to the second transistor;
a first word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter;
a third transistor connected to an output portion of the first inverter or an output portion of the second inverter, and the power supply line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to the third transistor;
a fifth transistor connected to the fourth transistor;
a second word line connected to a gate electrode of the fifth transistor; and
a third data line connected to the fifth transistor. - View Dependent Claims (30)
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31. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a first data line connected to the first transistor;
a second transistor connected to an input terminal of the second inverter;
a second data line connected to the second transistor;
a first word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter;
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the first inverter and the ground line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to an output portion of the second inverter;
a fifth transistor connected to the fourth transistor;
a second word line connected to a gate electrode of the fifth transistor; and
a third data line connected to the fifth transistor. - View Dependent Claims (32)
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33. A semiconductor device comprising:
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an inverter circuit including a first inverter and a second inverter for holding a data;
a first transistor connected to an input terminal of the first inverter;
a first data line connected to the first transistor;
a second transistor connected to an input terminal of the second inverter;
a second data line connected to the second transistor;
a first word line connected to gate electrodes of the first transistor and the second transistor;
a power supply line connected to the first inverter and the second inverter;
a ground line connected to the first inverter and the second inverter;
at least one of a third transistor, a resistor, and a capacitor connected to an output portion of the second inverter and the ground line;
a fourth transistor connected to the ground line, wherein a gate electrode of the fourth transistor is connected to an output portion of the first inverter;
a fifth transistor connected to the fourth transistor;
a second word line connected to a gate electrode of the fifth transistor; and
a third data line connected to the fifth transistor. - View Dependent Claims (34)
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Specification