POST LAST WIRING LEVEL INDUCTOR USING PATTERNED PLATE PROCESS
First Claim
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1. A method of forming a semiconductor device, comprising:
- providing a substrate having at least one metal wiring level within the substrate;
depositing an insulative layer on a surface of the substrate;
forming an inductor within the insulative layer using a patterned plate process; and
forming a wire bond pad within the insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor.
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Abstract
A method of forming a semiconductor structure, and the semiconductor structure so formed, wherein a transmission line, such as an inductor, is formed on a planar level above the surface of a last metal wiring level.
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Citations
21 Claims
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1. A method of forming a semiconductor device, comprising:
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providing a substrate having at least one metal wiring level within the substrate;
depositing an insulative layer on a surface of the substrate;
forming an inductor within the insulative layer using a patterned plate process; and
forming a wire bond pad within the insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of forming a semiconductor device, comprising:
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providing a substrate having at least one metal wiring level within the substrate;
depositing a first insulative layer on a surface of the substrate;
forming a wire bond pad within the first insulative layer;
depositing a second insulative layer on the first insulative layer and the wire bond pad; and
forming an inductor within the second insulative layer using a patterned plate process, wherein the inductor is formed substantially co-planar with at least a portion of the wire bond pad. - View Dependent Claims (8, 9, 10)
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11. A method of forming a semiconductor device, comprising:
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providing a substrate having at least one metal wiring level within the substrate;
depositing a first insulative layer on a surface of the substrate;
forming a portion of a wire bond pad within the first insulative layer;
depositing a second insulative layer on the first insulative layer;
forming an inductor within the second insulative layer using a patterned plate process; and
forming a remaining portion of the wire bond pad within the second insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A semiconductor structure, comprising:
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a substrate having at least one metal wiring level within the substrate;
an insulative layer on a surface of the substrate;
an inductor within the insulative layer; and
a wire bond pad within the insulative layer, wherein the inductor and the wire bond pad are substantially co-planar and wherein the inductor has a height greater than a height of the wire bond pad. - View Dependent Claims (18, 19, 20, 21)
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Specification