Method of forming low resistance tungsten films

• US 20070026671A1
• Filed: 06/29/2006
• Published: 02/01/2007
• Est. Priority Date: 07/13/2005
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Rak-Hwan, Kim, Young-Cheon
• Application Number:
  US11/476,793
• Publication Number:
  US 20070026671A1
• Time in Patent Office: Days
• US Class Current: 438/648
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76865 Selective removal of parts of the layer H01L21/76844 takes precedence
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material

Abstract

Provided is a method for forming low resistance metal films in which an underlying film, for example, a barrier layer or an adhesion layer, is formed on a semiconductor substrate. The underlying film is then subjected to a partial etch back in order to reduce the surface roughness and form a deposition surface. A metal film, for example, a tungsten film, is then formed on a deposition surface that has been formed on the underlying film. Forming the metal film on the deposition surface that has reduced surface roughness will tend to produce a metal film having a larger average grain size and, consequently, a lower sheet resistivity for a given film thickness.

Claims

1. A method of forming a tungsten film, comprising:

forming a first film having an initial surface roughness on a semiconductor substrate;

removing an upper portion of the first film to form a deposition surface having a reduced surface roughness relative to the initial surface roughness; and

forming a tungsten film on the deposition surface.

2. The method according to claim 1, wherein the deposition surface exhibits a RMS roughness of no more than about 10 Å

.

3. A method of forming a metallic wiring pattern in a semiconductor device comprising:

forming an adhesion layer having an initial surface roughness on a semiconductor substrate;

reducing the initial surface roughness of the adhesion layer to form a deposition surface on the adhesion layer;

forming a layer of a metallic material on the deposition surface; and

removing portions of the metallic material and the adhesion layer to form the metallic wiring pattern.

4. The method of forming a metallic wiring pattern according to claim 3, further comprising:

forming an insulating interlayer on the semiconductor substrate;

forming a contact hole in the insulating interlayer to expose a portion of the semiconductor substrate;

forming a barrier layer in the contact hole;

forming a conductive contact plug on the barrier layer in the contact hole; and

forming the adhesion layer on the insulating interlayer and an upper surface of the conductive contact plug, whereby electrical contact is formed between the metallic wiring pattern and the semiconductor substrate.

5. The method according to claim 4, wherein the adhesion layer comprises titanium nitride.

6. The method according to claim 4, wherein the metallic material comprises tungsten.

7. The method according to claim 4, wherein the metallic material consists essentially of tungsten.

8. The method according to claim 4, wherein the deposition surface has a RMS roughness of no more than about 10 Å

.

9. The method according to claim 4, wherein forming the conductive contact plug on the barrier layer in the contact hole includes:

forming the barrier layer in the contact hole and an upper surface of the insulating interlayer;

forming a metal film on the barrier layer, a thickness of the metal film being sufficient to fill the contact hole; and

removing an upper portion of the metal film and the barrier layer to expose the upper surface of the insulating interlayer.

10. The method according to claim 9, wherein:

the barrier layer includes a first layer of titanium formed on the insulating interlayer and a second layer of titanium nitride formed on the first layer; and

the metal film includes a major portion of tungsten.

11. A method of forming a conductive wiring pattern in a semiconductor device, comprising:

forming an insulating interlayer on a semiconductor substrate;

forming a contact hole in the insulating interlayer to expose a portion of the semiconductor substrate;

forming a barrier layer having an initial RMS surface roughness on the contact hole and the insulating interlayer;

removing an upper portion of the barrier layer to form a deposition surface having a final RMS surface roughness less than that of the initial RMS surface roughness;

forming a metal film on the deposition surface; and

removing portions of the metal film and the barrier layer to form a metal wiring pattern.

12. The method according to claim 11, wherein the metal film comprises tungsten.

13. The method according to claim 12, wherein forming the barrier layer includes:

forming a titanium film; and

forming a titanium nitride film on the titanium film.

14. The method according to claim 13, wherein removing the upper portion of the barrier layer includes etching back the titanium nitride layer to leave a sufficient thickness of the titanium nitride layer to protect the titanium layer.

15. The method according to claim 14, wherein the thickness of the titanium nitride layer is sufficient to protect the titanium layer from damage during the formation of the metal film on the deposition surface.

16. The method according to claim 15, wherein the thickness of the titanium nitride layer is sufficient to protect the titanium layer from damage by WF₆ during the formation of a tungsten film on the deposition surface.

17. The method according to claim 11, wherein removing the upper portion of the barrier layer includes etching back the barrier layer

18. The method according to claim 11, wherein the final RMS surface roughness is no more than about 10 Å

.

19. The method according to claim 11, wherein a ratio of the initial RMS surface roughness and the final RMS surface roughness is at least 2:

1.

20. The method according to claim 11, wherein a ratio of the initial RMS surface roughness and the final RMS surface roughness is at least 4:

1.