Phase locked loop circuit and semiconductor integrated circuit device using the same

• US 20070030079A1
• Filed: 07/19/2006
• Published: 02/08/2007
• Est. Priority Date: 08/08/2005
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Kokubo, Masaru, Kawamoto, Takashi
• Granted Patent: US 7,504,894 B2
• Time in Patent Office: Days
• US Class Current: 331/16
• CPC Class Codes: H03L 2207/06 Phase locked loops with a controlled oscillator having at least two frequency control terminals
• CPC Class Codes: H03L 7/0995 the oscillator comprising a ring oscillator
• CPC Class Codes: H03L 7/1976 using a phase accumulator for controlling the counter or frequency divider

Abstract

To provide a phase locked loop circuit that is capable of performing an automatic adjustment that satisfies a desired characteristic not depending on a process variation and an environmental variation. The phase locked loop circuit has a phase frequency comparator, a charge pump, a loop filter, a frequency divider, a selector, and a voltage controlled oscillator. The frequency divider inputs an output signal and a reference signal, divides the output signal, and outputs a feedback signal, and also outputs a select signal, a trimming signal, and a limit signal from the output signal. The voltage controlled oscillator inputs the control voltage, the base voltage, the trimming signal, and the limit signal, changes the output signal frequency according to the control voltage so as to limit the upper limit frequency of the output signal. Also, the voltage controlled oscillator is capable of changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, and the upper limit frequency of the output signal according to the limit signal.

Claims

1. A phase locked loop circuit comprising:

a phase frequency comparator;

a charge pump;

a loop filter;

a selector;

a voltage controlled oscillator;

a frequency divider; and

an adjustment unit,

wherein the phase frequency comparator compares a reference signal with a feedback signal that is outputted from the frequency divider to output a phase difference signal, and inputs the phase difference signal to the voltage controlled oscillator through the charge pump, the loop filter, and the selector as a control voltage to control a frequency and a phase of an output signal from the voltage controlled oscillator to given values,

wherein the voltage controlled oscillator is capable of setting a frequency sensitivity of the output signal and an upper limit frequency of the output signal with respect to the control voltage to arbitrary values, and

wherein the adjustment unit is capable of adjusting the frequency sensitivity and the upper limit frequency of the output signal of the voltage controlled oscillator according to an adjustment signal.

2. The phase locked loop circuit according to claim 1,

wherein the adjustment signal includes a trimming signal that sets the frequency sensitivity of the output signal with respect to the control voltage, and a limit signal that sets the upper limit frequency of the output signal.

3. The phase locked loop circuit according to claim 1,

wherein the adjustment signal includes a trimming signal that sets the frequency sensitivity of the output signal with respect to the control voltage, a limit signal that sets the upper limit frequency of the output signal, and a gain signal that sets an upper limit frequency characteristic of the output signal which is set to the frequency sensitivity and the upper limit frequency.

4. The phase locked loop circuit according to claim 1,

wherein the selector is capable of selecting an output voltage of the loop filter, a first reference voltage, and a second reference voltage according to a select signal to output the control voltage,

wherein the voltage controlled oscillator is capable of inputting the control voltage, a base voltage, a trimming signal, and a limit signal, changing the frequency of the output signal according to the control voltage, and setting the frequency sensitivity of the output signal and the upper limit frequency of the output signal with respect to the control voltage, and

wherein the frequency divider is integrated with the adjustment unit, has a controller that automatically adjusts the frequency sensitivity of the voltage controlled oscillator and the upper limit frequency of the output signal so as to satisfy a desired characteristic before the frequency and the phase of the output signal start the control, whereby the frequency divider is capable of inputting the output signal and the reference signal, dividing the output signal, and outputting the feedback signal, and is capable of outputting the select signal, the trimming signal, and the limit signal from the output signal.

5. The phase locked loop circuit according to claim 4,

wherein the frequency divider comprises:

a counter that inputs the output signal and the reference signal, divides the output signal by a given number of frequency divisions, outputs the feedback signal, counts the output signal for a given period of time, and outputs a count result; and

a calibration circuit that determines the count result that is outputted from the counter, and outputs the select signal, the trimming signal, and the limit signal.

6. The phase locked loop circuit according to claim 4,

wherein the voltage controlled oscillator comprises:

a voltage-to-current converter that inputs the control voltage, the base voltage, the trimming signal, and the limit signal, and allows the output control signal to change according to the trimming signal and the limit signal; and

a current controlled oscillator that controls the frequency of the output signal according to the control signal.

7. The phase locked loop circuit according to claim 6,

wherein the voltage-to-current converter circuit comprises:

a current comparator that inputs the control voltage, the base voltage, the trimming signal, and the limit signal, compares the control voltage with the base voltage, and outputs a determination voltage; and

a current subtracter that inputs the determination voltage, the control voltage, and the trimming signal, and outputs a subtraction result of the control voltage and the determination voltage as the control signal.

8. The phase locked loop circuit according to claim 6, wherein the voltage-to-current converter circuit comprises:

a current comparator that inputs the control voltage, the base voltage, the trimming signal, and the limit signal, compares a conversion voltage obtained by converting the control voltage with the base voltage, and outputs a determination voltage; and

a current subtracter that inputs the conversion voltage and the determination voltage, and outputs a subtraction result of the conversion voltage and the determination voltage as the control signal.

9. The phase locked loop circuit according to claim 1,

wherein the selector is capable of selecting the control voltage, a first reference voltage, and a second reference voltage according to a select signal, and outputting the control voltage,

wherein the voltage controlled oscillator is capable of inputting the control voltage, a base voltage, a trimming signal, a limit signal, and a gain signal, changing the frequency of the output signal according to the control voltage, limiting the upper limit frequency of the output signal, and changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, the upper limit frequency of the output signal according to the limit signal, and the upper limit frequency limit characteristic according to the gain signal, respectively, and

wherein the frequency divider is integrated with the adjustment unit, has a controller that automatically adjusts the frequency sensitivity of the voltage controlled oscillator, the upper limit frequency of the output signal, and the upper limit frequency limit characteristic so as to satisfy a desired characteristic before the frequency and the phase of the output signal start the control, inputting the output signal and the reference signal, dividing the output signal, outputting the feedback signal, and outputting the select signal, the trimming signal, the limit signal, and the gain signal from the output signal.

10. The phase locked loop circuit according to claim 9,

wherein the frequency divider is integrated with the adjustment unit,

wherein the frequency divider is capable of inputting the output signal and the reference signal, dividing the output signal by a given number of frequency division, and outputting the feedback signal, and

wherein the frequency divider comprises:

a counter that counts the output signals for a given period of time to output a count result; and

a calibration circuit that determines the count result that is outputted from the counter to output the select signal, the trimming signal, the limit signal, and the gain signal.

11. The phase locked loop circuit according to claim 9,

wherein the voltage controlled oscillator comprises:

a voltage-to-current converter that inputs the control voltage, the base voltage, the trimming signal, the limit signal, and the gain signal, and allows the output control signal to change according to the trimming signal, the limit signal, and the gain signal; and

a current controlled oscillator that controls the frequency of the output signal according to the control signal.

12. The phase locked loop circuit according to claim 11,

wherein the voltage-to-current converter circuit comprises:

a current comparator that inputs the control voltage, the base voltage, the trimming signal, the limit signal, and the gain signal, compares the control voltage with the base voltage, and outputs a determination voltage; and

a current subtracter that inputs the determination voltage, the control voltage, and the trimming signal, and outputs a subtraction result of the control voltage and the determination voltage as the control signal.

13. The phase locked loop circuit according to claim 11,

wherein the voltage-to-current converter circuit comprises:

a current comparator that inputs the control voltage, the base voltage, the trimming signal, the limit signal, and the gain signal, compares a conversion voltage obtained by converting the control voltage with the base voltage, and outputs a determination voltage; and

a current subtracter that inputs the conversion voltage and the determination voltage, and outputs a subtraction result of the conversion voltage and the determination voltage as the control signal.

14. The phase locked loop circuit according to claim 1,

wherein the selector is capable of selecting the control voltage, a first reference voltage, and a second reference voltage according to a select signal to output the control voltage,

wherein the voltage controlled oscillator is capable of inputting the control voltage, a base voltage, a trimming signal, and a limit signal, changing the frequency of the output signal according to the control voltage, limiting the upper limit frequency of the output signal, and changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, and the upper limit frequency of the output signal according to the limit signal, respectively,

wherein the frequency divider is capable of inputting the output signal and the reference signal, dividing the output signal, outputting the feedback signal, counting the output signal for a given period of time, and outputting a count result, and

wherein the adjustment unit comprises:

a calibration circuit that determines the count result, and outputs the select signal, the trimming signal, and the limit signal; and

a controller that automatically adjusts the frequency sensitivity of the voltage controlled oscillator and the upper limit frequency of the output signal so as to satisfy a desire characteristic before the frequency and the phase of the output signal start the control.

15. The phase locked loop circuit according to claim 1,

wherein the selector is capable of selecting the control voltage, a first reference voltage, and a second reference voltage according to a select signal to output the control voltage,

wherein the voltage controlled oscillator is capable of inputting the control voltage, a base voltage, a trimming signal, a limit signal, and a gain signal, changing the frequency of the output signal according to the control voltage, limiting the upper limit frequency of the output signal, and changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, the upper limit frequency of the output signal according to the limit signal, and the upper limit frequency limit characteristic according to the gain signal, respectively,

wherein the frequency divider is capable of inputting the output signal and the reference signal, dividing the output signal, outputting the feedback signal, counting the output signal for a given period of time, and outputting a count result, and

wherein the adjustment unit comprises:

a calibration circuit that determines the count result, and outputs the select signal, the trimming signal, the limit signal, and the gain signal; and

a controller that automatically adjusts the frequency sensitivity of the voltage controlled oscillator and the upper limit frequency of the output signal so as to satisfy a desire characteristic before the frequency and the phase of the output signal start the control.

16. The phase locked loop circuit according to claim 1,

wherein the selector is capable of selecting the control voltage, a first reference voltage, a second reference voltage, a first external voltage, and a second external voltage according to a select signal to output the control voltage,

wherein the voltage controlled oscillator is capable of inputting the control voltage, a base voltage, a trimming signal, a limit signal, and a gain signal, changing the frequency of the output signal according to the control voltage, limiting the upper limit frequency of the output signal, and changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, the upper limit frequency of the output signal according to the limit signal, and the upper limit frequency limit characteristic according to the gain signal, respectively,

wherein the frequency divider is capable of inputting the output signal and the reference signal, dividing the output signal, outputting the feedback signal, counting the output signal for a given period of time, and outputting a count result, and

wherein the adjustment unit comprises:

a calibration circuit that determines the count result, and outputs the select signal, the trimming signal, the limit signal, and the gain signal;

a register that supplies a switch signal for switching over a manual adjustment and an automatic adjustment; and

a controller that automatically adjusts the frequency sensitivity of the voltage controlled oscillator and the upper limit frequency of the output signal so as to satisfy a desired characteristic before the frequency and the phase of the output signal start the control.

17. The phase locked loop circuit according to claim 1,

wherein the selector is capable of selecting the control voltage, a first reference voltage, and a second reference voltage according to a select signal to output the control voltage,

wherein the voltage controlled oscillator is capable of inputting the control voltage, a base voltage, a trimming signal, a limit signal, and a gain signal, changing the frequency of the output signal according to the control voltage, limiting the upper limit frequency of the output signal, and changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, the upper limit frequency of the output signal according to the limit signal, and the upper limit frequency limit characteristic according to the gain signal, respectively,

wherein the frequency divider is integrated with the adjustment unit and is capable of inputting the output signal, the reference signal, the number of frequency divisions, dividing the output signal, outputting the feedback signal, and outputting the select signal, the trimming signal, the limit signal, and the gain signal from the output signal,

wherein the frequency divider comprises:

a waveform generating unit that inputs the reference signal to output the modulation signal; and

a modulator that inputs the modulation signal, modulates the modulation signal, and outputs the number of frequency divisions, and

wherein the frequency divider includes a controller that automatically adjusts the frequency sensitivity of the voltage controlled oscillator, the upper limit frequency of the output signal, and the upper limit frequency limit characteristic so as to satisfy a desire characteristic before the frequency and the phase of the output signal start the control.

18. A semiconductor integrated circuit device, comprising:

a clock data recovery that generates reproduced data and a reproduced clock from serial input signals on the basis of a given standard;

a first phase locked loop circuit that supplies a clock for generating the reproduced clock;

a parallel to serial converter that converts the serial reproduced data to parallel data according to the reproduced data and the reproduced clock;

a parallel to serial converter that converts the inputted parallel input signal to a serial signal to output the serial signal on the basis of the given standard; and

a second phase locked loop circuit that generates a clock signal that is supplied to the parallel to serial converter,

wherein each of the first phase locked loop circuit and the second phase locked loop circuit includes a phase frequency comparator, a charge pump, a loop filter, a voltage controlled oscillator, a frequency divider, and an adjustment unit, the phase frequency comparator compares a reference signal with a feedback signal that is outputted from the frequency divider to output a phase difference signal, and inputs the phase difference signal to the voltage controlled oscillator through the charge pump and the loop filter as a control voltage to control a frequency and a phase of an output signal from the voltage controlled oscillator to given values,

wherein the adjustment unit is capable of adjusting the frequency and the phase of the output signal of the voltage controlled oscillator according to an adjustment signal, and

wherein the voltage controlled oscillator is capable of limiting a frequency sensitivity of the output signal and an upper limit frequency of the output signal with respect to the control voltage to arbitrary values on the basis of the adjustment signal.

19. The semiconductor integrated circuit device according to claim 18,

wherein the adjustment signal includes a trimming signal that sets the frequency sensitivity of the output signal with respect to the respective control voltages of a phase locked loop circuit that generates the clock signal which is supplied to the parallel to serial converter and a phase locked loop circuit that supplies a clock for generating the reproduced clock, and a limit signal that sets the upper limit frequency of the output signal.

20. A semiconductor integrated circuit device, comprising:

a phase locked loop circuit that generates a clock signal;

.

a logic circuit that inputs the clock signal and an input data signal, operates on the basis of the clock signal, and outputs write data;

a signal processor circuit that inputs read data and outputs a synchronous clock signal in synchronization with the read data; and

a logic circuit that inputs the synchronous clock signal and the read data, operates on the basis of the synchronous clock signal, and outputs output data,

wherein the phase locked loop circuit includes a phase frequency comparator, a charge pump, a loop filter, a voltage controlled oscillator, a frequency divider, and an adjustment unit, the phase frequency comparator compares a reference signal with a feedback signal that is outputted from the frequency divider to output a phase difference signal, and outputs the phase difference signal to the voltage controlled oscillator through the charge pump and the loop filter as a control voltage to control a frequency and a phase of an output signal from the voltage controlled oscillator to given values,

wherein the adjustment unit is capable of adjusting the frequency and the phase of the output signal of the voltage controlled oscillator according to an adjustment signal, and

wherein the voltage controlled oscillator is capable of limiting a frequency sensitivity of the output signal and an upper limit frequency of the output signal with respect to the control voltage to arbitrary values on the basis of the adjustment signal.