Structures and methods for forming shielded gate field effect transistors
First Claim
Patent Images
1. A method for forming a field effect transistor comprising:
- forming a trench in a semiconductor region;
forming a dielectric layer lining the trench sidewalls and bottom;
filling the trench with a conductive material;
recessing the conductive material into the trench to thereby form a shield electrode in a bottom portion of the trench, the recessing comprising isotropic etching of the conductive material; and
forming an inter-electrode dielectric (IED) over the recessed shield electrode.
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Abstract
A field effect transistor is formed as follows. A trench is formed in a semiconductor region. A dielectric layer lining the trench sidewalls and bottom is formed. The trench is filled with a conductive material. The conductive material is recessed into the trench to thereby form a shield electrode in a bottom portion of the trench. The recessing of the conductive material includes isotropic etching of the conductive material. An inter-electrode dielectric (IED) is formed over the recessed shield electrode.
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Citations
22 Claims
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1. A method for forming a field effect transistor comprising:
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forming a trench in a semiconductor region;
forming a dielectric layer lining the trench sidewalls and bottom;
filling the trench with a conductive material;
recessing the conductive material into the trench to thereby form a shield electrode in a bottom portion of the trench, the recessing comprising isotropic etching of the conductive material; and
forming an inter-electrode dielectric (IED) over the recessed shield electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for forming a field effect transistor comprising:
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forming a trench in a semiconductor region;
forming a dielectric layer lining trench sidewalls and bottom and extending over surfaces of the semiconductor region adjacent the trench;
after forming the dielectric layer, filling a lower portion of the trench with a shield electrode;
thinning down the dielectric layer, whereby the dielectric layer forms a surface area adjacent to but below a top surface of the shield electrode; and
after thinning down the dielectric layer, recessing the shield electrode to the same level as or below the surface area of the dielectric layer, wherein the thinned down dielectric layer protects upper trench sidewalls and the surfaces of the semiconductor region adjacent the trench during recessing the shield electrode. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A method for forming a field effect transistor comprising:
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forming a trench in a semiconductor region;
forming a dielectric layer lining sidewalls and bottom surface of the trench, the dielectric layer being thicker along lower sidewalls and the bottom surface than along upper sidewalls of the trench;
after forming the dielectric layer, filling a lower portion of the trench with a shield electrode;
forming dielectric spacers along the upper trench sidewalls;
after forming the dielectric spacers, forming an inter-electrode dielectric (IED) in the trench over the shield electrode; and
after forming the IED removing the dielectric spacers. - View Dependent Claims (18, 19, 20, 21)
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22-71. -71. (canceled)
Specification