Semiconductor device

• US 20070035016A1
• Filed: 08/08/2006
• Published: 02/15/2007
• Est. Priority Date: 08/09/2005
• Status: Abandoned Application

• Current Assignee: Fujitsu Limited, Fujitsu Media Devices Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited, Fujitsu Media Devices Limited (Fujitsu Limited)
• Inventors: Takahashi, Yuji, Katsuki, Takashi, Ishikawa, Hiroshi, Sano, Satoshi, Nakazawa, Fumihiko, Yamaji, Takayuki
• Application Number:
  US11/500,427
• Publication Number:
  US 20070035016A1
• Time in Patent Office: Days
• US Class Current: 257/723
• CPC Class Codes: B81B 2201/0242 Gyroscopes
• CPC Class Codes: B81B 2201/042 Micromirrors, not used as optical switches
• CPC Class Codes: B81B 2207/097 Interconnects arranged on the substrate or the lid, and covered by the package seal
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: G01C 19/5719 using planar vibrating masses driven in a translation vibration along an axis
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/30107 Inductance

Abstract

A semiconductor device includes a chip having a base semiconductor layer, an insulation layer provided on the base semiconductor layer, and an upper semiconductor layer provided on the insulation layer; a mounting substrate on which the chip is mounted at the base semiconductor layer; and a connecting portion that electrically couples first terminals provided on the mounting substrate and a surface or second terminals provided thereon of the base semiconductor layer.

Claims

1. A semiconductor device comprising:

a chip having a base semiconductor layer, an insulation layer provided on the base semiconductor layer, and an upper semiconductor layer provided on the insulation layer;

a mounting substrate on which the chip is mounted at the base semiconductor layer; and

a connecting portion that electrically couples first terminals provided on the mounting substrate and a surface or second terminals provided thereon of the base semiconductor layer.

2. The semiconductor device as claimed in claim 1, wherein the chip includes a driving portion.

3. The semiconductor device as claimed in claim 1, wherein the connecting portion is a metal wire or a wiring of a flexible printed circuit board.

4. The semiconductor device as claimed in claim 1, wherein the connecting portion electrically couples the upper semiconductor layer and the surface of the base semiconductor layer.

5. The semiconductor device as claimed in claim 1, further comprising an electrically coupling portion that electrically couples the upper semiconductor layer and the base semiconductor layer, wherein the connecting portion electrically couples the chip and the upper semiconductor layer through the base semiconductor layer.