Protection circuit, flat display device using the same, and method for driving flat display device using the same

• US 20070035533A1
• Filed: 06/29/2006
• Published: 02/15/2007
• Est. Priority Date: 06/29/2005
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Kim, Sang
• Granted Patent: US 7,944,661 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 2330/02 Details of power systems and of start or stop of display operation
• CPC Class Codes: G09G 2330/04 Display protection
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04

Abstract

A protection circuit which is capable of preventing a faulty operation resulting from an abnormal control signal a method for operating the same, a flat display device using the same, and a method for driving the flat display device using the same are disclosed. The protection circuit includes a reference voltage output circuit for outputting a first reference voltage corresponding to a minimum allowable voltage of a control signal and a second reference voltage corresponding to a maximum allowable voltage of the control signal, and a comparison circuit, comparing a level of the control signal with the first reference voltage and second reference voltage and supplying a output control voltage corresponding to the control signal representing the a high-logic state to the controller when the level of the control signal has a value between the first reference voltage and the second reference voltage.

Claims

1. A protection circuit for flat display device comprising:

a reference voltage circuit outputting a first reference voltage and a second reference voltage ; and

a comparison circuit adapted to compare a level of the input control signal with the first reference voltage and second reference voltage and supplying an output control voltage corresponding to the input control signal when the level of the input control signal has a value between the first reference voltage and the second reference voltage.

2. The protection circuit as set forth in claim 1, wherein the first reference voltage corresponds to a minimum allowable voltage of a controller that receives the control signal.

3. The protection circuit as set forth in claim 1, wherein the second reference voltage corresponds to a maximum allowable voltage of a controller that receives the control signal.

4. The protection circuit as set forth in claim 1, wherein the reference voltage output circuit comprises:

a plurality of resistors connected in series between a first voltage source and a ground terminal;

a first node for outputting the first reference voltage; and

a second node for outputting the second reference voltage.

5. The protection circuit as set forth in claim 4, further comprising:

a first stabilizer for stabilizing the first reference voltage outputted from the first node; and

a second stabilizer for stabilizing the second reference voltage outputted from the second node.

6. The protection circuit as set forth in claim 5, wherein the first stabilizer comprises a capacitor connected between the first node and the ground terminal, and the second stabilizer comprises a capacitor connected between the second node and the ground terminal.

7. The protection circuit as set forth in claim 1, wherein the comparison circuit comprises:

a second voltage source for supplying an output control voltage corresponding to a high-logic voltage of the input control signal;

a first comparator having a non-inverting terminal receiving the input control signal, an inverting terminal for receiving the first reference voltage, and an output terminal outputting the output control voltage; and

a second comparator having an inverting terminal receiving the input control signal, an non-inverting terminal receiving the second reference voltage, and an output terminal outputting the output control voltage, the output terminal of the second comparator connected commonly with the output terminal of the first comparator.

8. The protection circuit as set forth in claim 7, wherein a resistor is connected between the second voltage source and the output terminals of the first and second comparators connected commonly with each other.

9. The protection circuit as set forth in claim 7, further comprising a signal attenuator connected between the input terminal and inputs to the first and second comparators.

10. The protection circuit as set forth in claim 9, wherein the signal attenuator comprises:

two impedance elements connected in series between the input terminal and a ground terminal; and

a third node provided between impedance elements to output the attenuated control signal.

11. The protection circuit as set forth in claim 10, wherein each of two impedance elements comprises one or more resistors.

12. The protection circuit as set forth in claim 9, further comprising an impedance matching circuit connected between the input terminal and the signal attenuator.

13. The protection circuit as set forth in claim 1, further comprising an impedance matching circuit connected between the input terminal and the reference voltage output circuit for performing impedance matching.

14. The protection circuit as set forth in claim 12 or 13, wherein the impedance matching circuit comprises:

a resistor connected between the input terminal and a ground terminal; and

a capacitor connected in parallel to the resistor.

15. A flat display device comprising:

a display unit for configured for displaying an image;

a driving circuit for operating the display unit such that the display unit displays the image;

a system power supply;

a controller for controlling the driving circuit and the system power supply;

a pulse width modulation producing a control signal;

a reference voltage circuit for outputting a first reference voltage and a second reference voltage; and

a comparison circuit configured to compare a level of the control signal with the first reference voltage and second reference voltage, and supplying a output control voltage to the controller only when the level of the control signal has a value between the first reference voltage and the second reference voltage.

16. The flat display device as set forth in claim 15, wherein the reference voltage circuit comprises:

a plurality of resistors connected in series between a first voltage source and a ground terminal;

a first node for outputting the first reference voltage; and

a second node for outputting the second reference voltage.

17. The flat display device as set forth in claim 16, further comprising:

a first stabilizer for stabilizing the first reference voltage output from the first node; and

a second stabilizer for stabilizing the second reference voltage output from the second node.

18. The flat display device as set forth in claim 17, wherein the first stabilizer comprises a capacitor connected between the first node and the ground terminal, and the second stabilizer comprises a capacitor connected between the second node and the ground terminal.

19. The flat display device as set forth in claim 15, wherein the comparison circuit comprises:

a second voltage source for supplying the output control voltage corresponding to a high-logic voltage;

a first comparator having an non-inverting terminal receiving the control signal, an inverting terminal receiving the first reference voltage, and an output terminal to output the output control voltage; and

a second comparator having an inverting terminal receiving the control signal, a non-inverting terminal receiving the second reference voltage, and an output terminal to output the output control voltage,

wherein the output terminal of the second comparator and the output terminal of the first comparators are connected commonly.

20. The flat display device as set forth in claim 19, wherein the comparison circuit further comprises a resistor connected between the second voltage source and the output terminals of the first and second comparators commonly connected each other.

21. The flat display device as set forth in claim 15, further comprising a signal attenuator connected between the input terminal and the first and second comparators to attenuate the control signal from the pulse width modulation unit by a predetermined ratio and to supply the attenuated control signal to the comparison circuit.

22. The liquid crystal display device as set forth in claim 21, wherein the signal attenuator comprises:

two impedance elements connected in series between the input terminal and a ground terminal; and

a third node provided between impendence elements for outputting the attenuated control signal.

23. The flat display device as set forth in claim 22, wherein each of two impedance elements comprises one or more resistors.

24. The flat display device as set forth in claim 21, further comprising an impedance matching circuit connected between the input terminal and the attenuator.

25. The flat display device as set forth in claim 19, further comprising an impedance matching circuit connected between the input terminal and the signal attenuator for performing impedance matching.

26. The flat display device as set forth in claim 24 or 25, wherein the impedance matching circuit comprises:

a resistor connected between the input terminal and a ground terminal; and

a capacitor connected in parallel to the resistor.

27. The flat display device as set forth in claim 19, wherein the flat display device is LCD.

28. The flat display device as set forth in claim 19, wherein the first reference voltage corresponds to a minimum allowable voltage of the controller that receives the control signal.

29. The flat display device as set forth in claim 19, wherein the second reference voltage corresponds to a maximum allowable voltage of the controller that receives the control signal.

30. A method for driving a protection circuit for flat display device, comprising the steps of:

comparing a level of a control signal for control of a controller with a first reference voltage;

comparing the level of the control signal with a second reference voltage; and

supplying an output control voltage when the level of the control signal has a value between the first reference voltage and the second reference voltage.

31. The method as set forth in claim 30, further comprising, before the steps of comparing the level of the control signal with the first and second reference voltages, the step of attenuating the level of the control signal by a predetermined ratio.

32. The method as set forth in claim 31, further comprising, before the step of attenuating the control signal, the step of impedance matching the control signal.

33. The method as set forth in claim 32, further comprising the step of stabilizing the first reference voltage and the second reference voltage, before comparing a level of the attenuated control signal with the first and second reference voltages.

34. The flat display device as set forth in claim 30, wherein the first reference voltage corresponds to a minimum allowable voltage of the controller that receives the control signal.

35. The flat display device as set forth in claim 30, wherein the second reference voltage corresponds to a maximum allowable voltage of the controller that receives the control signal.

36. A method for driving a flat display device, the display device including a display unit for displaying an image, a driving circuit for operating the display unit such that the display unit displays the image, a system power supply for supplying voltage signals necessary to the driving circuit, and a controller for controlling the driving circuit and the system power supply in response to an external control signal, the method comprising the steps of:

comparing a level of the control signal with a first reference voltage;

comparing the level of the control signal with a second reference voltage; and

supplying a output control voltage corresponding to the control signal only when the level of the control signal has a value between the first reference voltage and the second reference voltage.

37. The method as set forth in claim 36, further comprising, before the steps of comparing the level of the control signal with the first and second reference voltages, the step of attenuating the control signal.

38. The method as set forth in claim 37, further comprising, before the step of attenuating the control signal, the step of impedance matching the control signal.

39. The method as set forth in claim 38, further comprising the step of stabilizing the first reference voltage and the second reference voltage, before comparing a level of the attenuated control signal with the first and second reference voltages.

40. The flat display device as set forth in claim 36, wherein the first reference voltage corresponds to a minimum allowable voltage of the controller that receives the control signal.

41. The flat display device as set forth in claim 36, wherein the second reference voltage corresponds to a maximum allowable voltage of the controller that receives the control signal.