Multichip packages with exposed dice
First Claim
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1. A method of packaging integrated circuits comprising:
- providing a semiconductor wafer that has an array of mother dice formed therein;
mounting a multiplicity of singulated daughter dice on the wafer, each daughter die being mounted on an associated mother die and electrically connected to the mother die by direct soldering using a flip chip mounting approach, wherein the daughter dice have shorter lengths and widths than the mother dice such that the mother dice have at least some contacts that are exposed relative to their respective daughter dice, and wherein the wafer having the array of mother dice has not been diced or singulated prior to the mounting of the daughter dice.
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Abstract
Multichip packages and methods for making same. The present invention generally allows for either the back of a flipchip, the back of a mother die, or both to be exposed in a multichip package. When the mother die is connected to the package contacts, the back of the flip chip is higher than the electrical connections. Accordingly, the back of the flip chip can be exposed. Furthermore, if a temporary tape substrate is used with a leadframe panel that does not have a die attach pad, the package can be even thinner. Once the temporary tape substrate is removed, both the back of the flipchip and the back of the mother die will be exposed from the encapsulant.
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Citations
13 Claims
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1. A method of packaging integrated circuits comprising:
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providing a semiconductor wafer that has an array of mother dice formed therein;
mounting a multiplicity of singulated daughter dice on the wafer, each daughter die being mounted on an associated mother die and electrically connected to the mother die by direct soldering using a flip chip mounting approach, wherein the daughter dice have shorter lengths and widths than the mother dice such that the mother dice have at least some contacts that are exposed relative to their respective daughter dice, and wherein the wafer having the array of mother dice has not been diced or singulated prior to the mounting of the daughter dice. - View Dependent Claims (2, 3)
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4. A method of packaging integrated circuits comprising:
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positioning a plurality of multi-chip stacks on a lead frame panel having a multiplicity of device areas, wherein each chip stack consists of a mother die having an active surface and a daughter die having an active surface, the active surface of the daughter die being flip chip mounted to the active surface of the mother die, and wherein each chip stack is positioned in an associated device area;
electrically connecting contacts on the mother dice of the selected chip stacks to contacts within their associated device area;
encapsulating the device areas of the lead frame panel; and
singulating the device areas after the encapsulation to create a multiplicity of individual stacked multi-chip packages. - View Dependent Claims (5, 6, 7, 8, 9, 10, 11, 12, 13)
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Specification