System and method for power conversion

• US 20070040534A1
• Filed: 10/31/2006
• Published: 02/22/2007
• Est. Priority Date: 09/30/2004
• Status: Abandoned Application

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Ghosh, Rajesh, Colombi, Silvio, Phansalkar, Bansidhar
• Application Number:
  US11/590,713
• Publication Number:
  US 20070040534A1
• Time in Patent Office: Days
• US Class Current: 323/207
• CPC Class Codes: H02M 1/4233 using a bridge converter comprising active switches
• CPC Class Codes: H02M 7/219 in a bridge configuration
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A power converter system is provided for supplying power to an electrical load. The power converter system includes a power converter circuit adapted to perform an AC to DC power conversion and an active clamp circuit coupled to the power converter circuit for regulating DC bus voltage overshoots. The power converter circuit is configured from a plurality of semiconductor switches having reverse voltage withstand capability.

Claims

1. A power converter system, comprising:

a bridge rectifier circuit comprising a plurality of semiconductor switches configured to convert an AC power in a step down conversion to a DC power, wherein each of the plurality of semiconductor switches is a single bipolar switch configured to withstand voltage in either direction without a blocking diode.

2. The power converter system of claim 1, comprising a clamp circuit configured to minimize voltage overshoots in the DC power.

3. The power converter system of claim 2, wherein the clamp circuit comprises a non-dissipative active clamp circuit.

4. The power converter system of claim 3, wherein the non-dissipative active clamp circuit is configured to absorb energy from the voltage overshoots and transfer the energy to an electrical load.

5. The power converter system of claim 1, comprising an active clamp circuit coupled to the bridge rectifier circuit, wherein the active clamp circuit is configured to act as a constant voltage source by minimizing irregularities in the DC power.

6. The power converter system of claim 5, wherein the active clamp circuit comprises:

a capacitor connected across a DC bus and charged to a DC bus voltage;

a buck converter circuit configured to discharge the capacitor when voltage across the capacitor exceeds a reference value; and

a boost converter circuit configured to charge the capacitor when voltage across the capacitor falls below the reference value.

7. The power converter system of claim 1, comprising a controller coupled to the bridge rectifier circuit and configured to control the plurality of semiconductor switches to provide a desired step down conversion.

8. The power converter system of claim 7, wherein the controller regulates switching of the plurality of semiconductor switches via pulse width modulation.

9. The power converter system of claim 1, comprising an AC filter configured to reduce irregularities relating to the bridge rectifier circuit.

10. The power converter system of claim 1, comprising a DC filter configured to reduce irregularities in the DC power output by the bridge rectifier circuit.

11. The power converter system of claim 10, wherein the DC filter further comprises an inductor and a capacitor.

12. The power converter system of claim 1, wherein the bridge rectifier circuit comprises a freewheeling diode in parallel with the plurality of semiconductor switches.

13. The power converter system of claim 1, wherein the plurality of semiconductor switches is configured to provide step down power conversion at a high power factor with reduced input current harmonics without employing an additional power factor correction stage.

14. A power converter system, comprising:

a power converter circuit adapted to convert an AC power to a DC power; and

an active clamp circuit coupled to the power converter circuit, wherein the active clamp circuit is configured to minimize irregularities in the DC power by storing energy from voltage overshoots and transferring the energy to an electrical load.

15. The power converter system of claim 14, wherein the power converter circuit comprises a step down power converter.

16. The power converter system of claim 14, wherein the power converter circuit comprises a plurality of semiconductor switches with integral or associated reverse voltage withstand capability, wherein the plurality of semiconductor switches is configured to provide step down power conversion at a high power factor with reduced input current harmonics without employing an additional power factor correction stage.

17. The power converter system of claim 14, wherein the power converter circuit comprises a plurality of bipolar semiconductor switches having integrated reverse voltage withstand capability.

18. The power converter system of claim 14, wherein the power converter circuit comprises a plurality of unipolar semiconductor switches and corresponding blocking diodes configured to provide reverse voltage withstand capability.

19. The power converter system of claim 14, wherein the power converter circuit comprises a plurality of semiconductor switches and a controller configured to control switching of the plurality of semiconductor switches via pulse width modulation.

20. The power converter system of claim 14, wherein the active clamp circuit is configured to charge and/or discharge a capacitor to maintain a generally constant DC voltage across a DC bus.

21. A method for power conversion, comprising:

converting an input AC voltage to an output DC voltage via a plurality of bipolar semiconductor switches having integrated reverse voltage withstand capability; and

controlling the plurality of bipolar semiconductor switches.

22. The method of claim 21, comprising minimizing irregularities in the output DC voltage by at least storing excess energy in response to voltage overshoots.

23. The method of claim 22, wherein minimizing comprises discharging a capacitor connected across a DC bus when voltage across the capacitor exceeds a reference value and charging the capacitor when voltage across the capacitor falls below the reference value.

24. The method of claim 21, wherein the AC to DC power conversion is a step down power conversion.