System monitor in a programmable logic device
First Claim
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1. A system monitor circuit in an integrated circuit comprising:
- an analog-to digital converter (ADC) configured to monitor a plurality of sensors;
a calibration circuit for calibrating an output of the ADC using a set value in a first register;
a filter circuit for filtering an output of the calibration circuit or an output of the ADC; and
a alarm circuit configured to determine an alarm condition by comparing the output of the calibration circuit or an output of the ADC or an output of the filter circuit with a set value in a second register.
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Abstract
Method and apparatus for a system monitor embedded in a programmable logic device are described. The system monitor includes a dynamic reconfiguration port interface for configuring or reconfiguring the system monitor during operation thereof. The system monitor includes an analog-to-digital converter which is reconfigurable responsive to input via a dynamic reconfiguration port.
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Citations
12 Claims
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1. A system monitor circuit in an integrated circuit comprising:
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an analog-to digital converter (ADC) configured to monitor a plurality of sensors;
a calibration circuit for calibrating an output of the ADC using a set value in a first register;
a filter circuit for filtering an output of the calibration circuit or an output of the ADC; and
a alarm circuit configured to determine an alarm condition by comparing the output of the calibration circuit or an output of the ADC or an output of the filter circuit with a set value in a second register. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A system monitor circuit in an integrated circuit comprising:
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selection circuitry coupled to a plurality of sensors, the selection circuitry configurable to select one of the plurality of sensors responsive to a first portion of control information;
an analog-to digital converter (ADC) configured to monitor the selected sensor the ADC configurable responsive to a second portion of the control information;
a calibration circuit for calibrating an output of the ADC using a set value in a first register;
a filter circuit for filtering an output of the calibration circuit or an output of the ADC; and
a alarm circuit configured to determine an alarm condition by comparing the output of the calibration circuit or an output of the ADC or an output of the filter circuit with a set value in a second register. - View Dependent Claims (8, 9, 10, 11, 12)
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Specification