Microelectromechanical devices and fabrication methods

• US 20070042521A1
• Filed: 08/16/2005
• Published: 02/22/2007
• Est. Priority Date: 08/16/2005
• Status: Active Grant

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Yama, Gary
• Granted Patent: US 7,956,428 B2
• Time in Patent Office: Days
• US Class Current: 438/48
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325

Abstract

There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. An embodiment further includes a buried polysilicon layer and a “protective layer” deposited over the buried polysilicon layer to prevent possible erosion of, or damage to the buried polysilicon layer during processing steps. The material that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilitates integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.

Claims

1. A method of fabricating an electromechanical device having a micromechanical structure overlying a substrate, wherein the micromechanical structure is in a chamber, the method comprising:

forming a buried polysilicon layer that includes conductive paths and at least one electrode;

depositing a protective layer over the buried polysilicon layer;

depositing an insulating layer over the protective layer;

depositing a functional epipoly layer over the oxide layer such that;

forming the micromechanical structure in the functional epipoly layer such that at least one selective electrical contact exists through the functional epipoly layer to the buried polysilicon layer.

2. The method of claim 1, further comprising creating the at least one selective electrical contact, including:

a first etch process to remove portions of the insulating layer; and

a second etch process to remove portions of the protective layer.

3. The method of claim 1, further comprising:

planarizing the insulating layer; and

creating the at least one selective electrical contact, including, a first etch process to remove portions of the insulating layer; and

a second etch process to remove portions of the protective layer.

4. The method of claim 1, further comprising:

planarizing the insulating layer;

etching the insulating layer, including,

a first etch process to remove portions of the insulating layer; and

a second etch process to remove portions of the protective layer, wherein etching creates the at least one electrical contact and further creates at least one monocrystalline area.

5. The method of claim 4, further comprising growing monocyrstalline material in the at least one monocrystalline area.

6. The method of claim 5, further comprising fabricating at least one CMOS device in the at least one monocrystalline area.

7. The method of claim 1, wherein the micromechanical structure is a movable sensor structure.

8. The method of claim 1, further comprising:

depositing a sacrificial oxide layer that encapsulates the micromechanical structure; and

forming at least one electrical contact in the sacrificial oxide layer.

9. The method of claim 8, further comprising:

depositing an epipoly layer over the sacrificial oxide layer;

etching the epipoly layer to create vents in the epipoly layer; and

performing an etch process that releases the micromechanical structure by removing portions of the sacrificial oxide layer.

10. The method of claim 9, wherein the protective layer is silicon nitride, the insulating layer is TEOS, and the sacrificial oxide layer is epitaxy polysilicon.

11. The method of claim 9, wherein the protective layer is silicon nitride, the insulating layer is TEOS, and the sacrificial oxide layer is epitaxy polysilicon, and the etch process that releases the micromechanical structure is an HF-vapor etch process.

12. A method of sealing a chamber of an electromechanical device having a mechanical structure overlying a substrate, wherein the mechanical structure is in the chamber, the method comprising:

depositing a protective layer over a buried polysilicon layer that includes conductive paths and at least one electrode;

forming the mechanical structure over the protective layer;

depositing a sacrificial layer over at least a portion of the mechanical structure;

depositing a first encapsulation layer over the sacrificial layer;

forming at least one vent through the first encapsulation layer to allow removal of at least a portion of the sacrificial layer;

removing at least a portion of the sacrificial layer to form the chamber;

depositing a second encapsulation layer over or in the vent to seal the chamber wherein the second encapsulation layer is a semiconductor material.

13. The method of claim 12 wherein the semiconductor material is comprised of polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide.

14. The method of claim 13 wherein the first encapsulation layer is comprised of a polycrystalline silicon, amorphous silicon, germanium, silicon/germanium or gallium arsenide.

15. The method of claim 12 wherein,

the first encapsulation layer is a semiconductor material that is doped with a first impurity to provide a first region of a first conductivity type, and

the second encapsulation layer is doped with a second impurity to provide a second region with a second conductivity type and wherein the first conductivity type is opposite the second conductivity type.

16. The method of claim 12 further including creating insulation trenches in the second encapsulation layer for insulating the mechanical structure.

17. The method of claim 16 further including refilling insulation trenches with an oxide layer over second encapsulation layer.

18. The method of claim 12 wherein depositing the first and second encapsulation layers includes using an epitaxial or a CVD reactor.

19. The method of claim 12 wherein the first encapsulation layer is comprised of a porous polycrystalline silicon or amorphous silicon and wherein the second encapsulation layer is comprised of polycrystalline silicon.

20. The method of claim 12 wherein a first portion of the first encapsulation layer is comprised of a monocrystalline silicon and a second portion is comprised of a polycrystalline silicon.

21. The method of claim 20 further including etching portions of the oxide layer to create contacts.

22. The method of claim 21 further including growing a monocrystalline silicon on the first portion of the first encapsulation layer.

23. An electromechanical device comprising:

a chamber including a first encapsulation layer having at least one vent;

a mechanical structure, wherein at least a portion of the mechanical structure is disposed in the chamber;

a protective layer over a buried polysilicon layer, wherein the buried polysilicon layer includes conductive paths and at least one electrode, wherein the protective layer forms at least part of a separating layer between the chamber and the buried polysilicon layer; and

a second encapsulation layer comprised of a semiconductor material, deposited over the at least one vent such that the chamber is sealed.

24. The electromechanical device of claim 23 wherein the second encapsulation layer is comprised of polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide.

25. The electromechanical device of claim 24 wherein the first encapsulation layer is comprised of polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, germanium, silicon/germanium, gallium arsenide, silicon nitride or silicon carbide.

26. The electromechanical device of claim 23 wherein:

the first encapsulation layer is a semiconductor material that is doped with a first impurity to provide a first region of a first conductivity type, and

the semiconductor material of the second encapsulation layer is doped with a second impurity to provide a second region with a second conductivity type and wherein the first conductivity type is opposite the second conductivity type.

27. The electromechanical device of claim 23 further including a contact disposed outside the chamber.

28. The electromechanical device of claim 27 wherein the contact is a semiconductor that is doped with impurities to increase the conductivity of the area.

29. The electromechanical device of claim 23 wherein a first portion of the first encapsulation layer is comprised of a monocrystalline silicon and a second portion is comprised of a polycrystalline silicon.

30. The electromechanical device of claim 23 wherein a first portion of the first encapsulation layer is comprised of a monocrystalline silicon and a second portion is comprised of a porous or amorphous silicon.

31. The electromechanical device of claim 27 wherein the second encapsulation layer overlying the second portion of the first encapsulation layer is a polycrystalline silicon.

32. The electromechanical device of claim 28 includes a field region disposed outside and above the chamber wherein the field region is comprised of a monocrystalline silicon.