Inter-thread communication of lock protected data

• US 20070044103A1
• Filed: 07/25/2005
• Published: 02/22/2007
• Est. Priority Date: 07/25/2005
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Rosenbluth, Mark, Wolrich, Gilbert, Jain, Sanjeev
• Application Number:
  US11/190,115
• Publication Number:
  US 20070044103A1
• Time in Patent Office: Days
• US Class Current: 718/104
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms

Abstract

In general, in one aspect, the disclosure describes a method that includes issuing, by a first thread at a first programmable unit of a set of multiple multi-threaded programmable units integrated within a single die, a request for a lock associated with data. The method also includes receiving, by the first thread, a grant for the lock and identification of a second thread to receive a grant for the lock after the lock is released by the first thread. The first thread initiates transfer of the data associated with the lock to the one of the multiple multi-threaded programmable units executing the second thread and releases the lock.

Claims

1. A method, comprising:

receiving, from a first thread of a first programmable unit of a set of multiple multi-threaded programmable units integrated within a single die, a first request for a lock associated with data;

receiving, from a second thread at a second programmable unit of the set of multiple multi-threaded programmable units, a second request for the lock associated with data; and

sending at least one message to the first thread granting the lock and identifying the second thread as the next thread to receive the lock.

2. The method of claim 1,

wherein the receiving the first request, the receiving the second request, and the sending at least one message comprises receiving the first request, receiving the second request, and sending the at least one message at circuitry integrated on the die and communicatively coupled to the multiple multi-threaded programmable units.

3. The method of claim 1, further comprising:

initiating transfer of the data from the first thread to the second thread.

4. The method of claim 3,

wherein the data is stored in a memory shared by the multiple multi-threaded programmable units;

and

wherein the first thread does not write the modified data to the shared memory.

5. The method of claim 3,

wherein the at least one message comprises a location of memory internal to the one of the multiple multi-threaded programmable units executing the second thread;

and

wherein the initiating the transfer comprises initiating a write into the specified location.

6. The method of claim 1, wherein the second request comprises a lock request requesting inter-thread transmission of the data.

7. A computer program, disposed on a computer readable medium, comprising instructions for causing a processor to:

issue, by a first thread at a first programmable unit of a set of multiple multi-threaded programmable units integrated within a single die, a request for a lock associated with data;

receive, by the first thread, a grant for the lock and identification of a second thread at a second programmable unit of the set of multiple multi-threaded programmable units integrated within a single die to receive a grant for the lock after the lock is released by the first thread;

modify, by the first thread, the data associated with the lock;

initiate, by the first thread, transfer of the data associated with the lock to the one of the multiple multi-threaded programmable units executing the second thread; and

issue, by the first thread, a request to release the lock.

8. The program of claim 7,

wherein the single die further comprises circuitry communicatively coupled to the multiple multi-threaded programmable units;

and

wherein the instructions to issue a request for a lock comprises at least one instruction to issue a request to the circuitry;

wherein the instructions to receive a grant for the lock and identification of a second thread comprise at least one instruction to receive a grant for the lock and identification of the second thread from the circuitry; and

wherein the instructions to issue a request to release the lock comprise at least one instruction to issue a request to the circuitry.

9. The program of claim 7,

wherein the data is stored in a memory shared by the multiple multi-threaded programmable units;

and

wherein the first thread does not write the modified data to the shared memory.

10. The program of claim 7,

wherein the first thread receives a location of memory internal to the one of the multiple multi-threaded programmable units executing the second thread;

and

wherein the instructions to initiate the transfer comprise at least one instruction to initiate a write into the specified location.

11. The program of claim 7,

further comprising at least one instruction to cause the second thread to issue a request for the first thread to initiate the transfer.

12. The program of claim 11, wherein the request also comprises a request for a lock grant.

13. A network device, comprising:

a switch fabric; and

multiple blades coupled to the switch fabric, at least one of the blades comprising a processor having multiple multi-threaded programmable units integrated on a single integrated die, the processor having circuitry integrated on the die and communicatively coupled the multiple multi-threaded programmable units, the circuitry to;

receive, from a first thread of a first programmable unit of a set of multiple multi-threaded programmable units integrated within a single die, a first request for a lock associated with data;

receive, from a second thread at a second programmable unit of the set of multiple multi-threaded programmable units, a second request for the lock associated with data; and

send at least one message to the first thread granting the lock and identifying the second thread as the next thread to receive the lock.

14. The device of claim 13, wherein the processor is programmed to:

issue, by the first thread, a request for a lock associated with data;

receive, by the first thread, a grant for the lock and the identification of a second thread;

modify, by the first thread, the data associated with the lock;

initiate, by the first thread, transfer of the data associated with the lock to the one of the multiple multi-threaded programmable units executing the second thread; and

issue, by the first thread, a request to release the lock.

15. The device of claim 13,

wherein the data is stored in a memory shared by the multiple multi-threaded programmable units;

and

wherein the first thread does not write the modified data to the shared memory.

16. The device of claim 13,

wherein the first thread receives the location of memory internal to the one of the multiple multi-threaded programmable units executing the second thread;

and

wherein initiating the transfer comprises initiating a write into the specified location.