Method of manufacturing wiring board

• US 20070044303A1
• Filed: 08/25/2006
• Published: 03/01/2007
• Est. Priority Date: 08/26/2005
• Status: Active Grant

• Current Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Original Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Inventors: Yamano, Takaharu
• Granted Patent: US 7,937,828 B2
• Time in Patent Office: Days
• US Class Current: 29/830
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68345 used as a support during the manufacture of self supporting substrates
• CPC Class Codes: H01L 2224/1134 Stud bumping, i.e. using a wire-bonding apparatus
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/81001 involving a temporary auxiliary member not forming part of the bonding apparatus
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/83001 involving a temporary auxiliary member not forming part of the bonding apparatus
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/86 using tape automated bonding [TAB]
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15192 : Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15331 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/3511 : Warping
• CPC Class Codes: H05K 1/186 : manufactured by mounting on or connecting to patterned circuits before or during embedding
• CPC Class Codes: H05K 2201/10674 : Flip chip
• CPC Class Codes: H05K 3/20 : by affixing prefabricated conductor pattern H05K1/187, H05K3/046, H05K3/4658, H05K3/4682 takes precedence
• CPC Class Codes: H05K 3/4644 : by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: H05K 3/4688 : Composite multilayer circuits, i.e. comprising insulating layers having different properties having a special base or central core H05K3/4602
• CPC Class Codes: Y10T 29/49117 : Conductor or circuit manufacturing
• CPC Class Codes: Y10T 29/49126 : Assembling bases
• CPC Class Codes: Y10T 29/49128 : Assembling formed circuit to base
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49135 : and shaping, e.g., cutting or bending, etc.
• CPC Class Codes: Y10T 29/49149 : by metal fusion bonding
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49156 : with selective destruction of conductive paths
• CPC Class Codes: Y10T 29/53174 : Means to fasten electrical component to wiring board, base, or substrate

Abstract

A method of manufacturing a wiring board including an insulating layer where a semiconductor chip is embedded includes: forming, on a supporting board, the insulating layer where the semiconductor chip is embedded and a wiring connected to the semiconductor chip; removing the supporting board by etching; and simultaneously forming first and second reinforcing layers so as to sandwich the insulating layer after removing the supporting board.

Claims

1. A method of manufacturing a wiring board, the method comprising:

forming, on a supporting board, an insulating layer in which a semiconductor chip is embedded and a wiring being connected to the semiconductor chip;

removing the supporting board; and

forming a first reinforcing layer and a second reinforcing layer simultaneously so as to sandwich the insulating layer after removing the supporting board.

2. The method of manufacturing a wiring board according to claim 1, wherein the reinforcing layer is made of a prepreg material.

3. The method of manufacturing a wiring board according to claim 1, the method comprising:

forming a stop layer on the supporting board before the insulating layer and the wiring are formed on the supporting board,

wherein the removal of the supporting board is stopped by the stop layer.

4. The method of manufacturing a wiring board according to claim 1, the method comprising:

forming a first solder resist layer and a second solder resist layer simultaneously after forming the first reinforcing layer and the second reinforcing layer, the first solder resist layer being laminated on the first reinforcing layer, and the second solder resist layer being laminated on the second reinforcing layer,

wherein an opening is formed at a wiring position in each of the first solder resist layer and the second solder resist layer.

5. The method of manufacturing a wiring board according to claim 4, the method comprising:

performing surface treatment simultaneously on a first wiring and a second wiring that are exposed from the opening formed in the first solder resist layer and the second solder resist layer respectively, after the first solder resist layer and the second solder resist layer are formed.