Organic electro-luminescence display apparatus and organic thin film transistor for the same

• US 20070046199A1
• Filed: 08/24/2006
• Published: 03/01/2007
• Est. Priority Date: 08/24/2005
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Won-tae, Lee, Seong-eui
• Application Number:
  US11/509,481
• Publication Number:
  US 20070046199A1
• Time in Patent Office: Days
• US Class Current: 313/512
• CPC Class Codes: H10K 10/80 Constructional details
• CPC Class Codes: H10K 10/88 Passivation; Containers; Encapsulations
• CPC Class Codes: H10K 50/844 Encapsulations

Abstract

An organic electro-luminescence display apparatus and an organic thin film transistor for the same include: a first electrode-layer supplying holes; a second electrode layer supplying electrons; an organic thin film layer disposed between the first electrode layer and the second electrode layer, the organic thin film layer emits light through the recombination of the holes and the electrons; and a sealing protection layer insulating at least the second electrode layer and the organic thin film layer from an external gas, wherein the sealing protection layer includes at least a LaF₃ layer. Since the penetration of harmful materials such as moisture or oxygen is prevented, the organic electro-luminescence display apparatus can provide constant performance. In addition, since an additional sealing structure is not required, the organic electro-luminescence display apparatus is lighter, thinner, and less costly to manufacture.

Claims

1. An organic electro-luminescence display apparatus comprising:

a first electrode layer which supplies holes;

a second electrode layer which supplies electrons;

an organic thin film layer disposed between the first electrode layer and the second electrode layer, the organic thin film layer emits light through the recombination of the holes and the electrons; and

a sealing protection layer which insulates at least the second electrode layer and the organic thin film layer from an external gas,

wherein the sealing protection layer comprises at least a LaF₃ layer.

2. The apparatus of claim 1, further comprising an insulation substrate defining a supporting structure,

wherein the first electrode layer, organic thin film layer, and second electrode layer are sequentially stacked on the insulation substrate, and

wherein the sealing protection layer seals an outer region ranging from the lateral sides of the organic thin film layer and the second electrode layer to the upper sides of the second electrode layer.

3. The apparatus of claim 1, wherein the sealing protection layer is a monolayer of the LaF₃ layer.

4. The apparatus of claim 1, wherein the sealing protection layer has a multilayer structure including at least two layers of the LaF₃ layer and one of an organic layer and an inorganic layer.

5. The apparatus of claim 4, wherein the inorganic layer is formed of one of silicon nitride and silicon oxide.

6. The apparatus of claim 1, wherein the sealing protection layer has a multilayer structure including at least three layers of the LaF₃ layer, an organic layer and an inorganic layer.

7. The apparatus of claim 6, wherein the inorganic layer is formed of one of silicon nitride and silicon oxide.

8. The apparatus of claim 1, wherein the sealing protection layer contacts the organic thin film layer and the second electrode layer.

9. The apparatus of claim 1, wherein the LaF₃ layer has a thickness of at least 30 nm.

10. The apparatus of claim 1, wherein the LaF₃ layer is formed using one deposition method selected from the group consisting of physical vapor deposition (PVD) including ion beam deposition and chemical vapor deposition (CVD) including low pressure CVD (LPCVD) and plasma enhanced CVD (PECVD).

11. An organic thin film transistor comprising:

a gate electrode formed on an insulation substrate;

an organic insulation layer covering the gate electrode;

a source electrode and a drain electrode formed on the upper surface of the organic insulation layer; and

an organic semiconductor layer formed on the source and drain electrodes, wherein the organic thin film transistor comprises;

a passivation layer which includes at least a LaF₃ layer, the LaF₃ layer is formed on the upper surface of the organic insulation layer or on the upper surface of the organic semiconductor layer.

12. The organic thin film transistor of claim 11, wherein the passivation layer is a monolayer of the LaF₃ layer.

13. The organic thin film transistor of claim 11, wherein the passivation layer has a multilayer structure including at least two layers of the LaF₃ layer and one of an organic layer and an inorganic layer.

14. The organic thin film transistor of claim 13, wherein the inorganic layer is formed of one of silicon nitride and silicon oxide.

15. The organic thin film transistor of claim 11, wherein the passivation layer has a multilayer structure including at least three layers of the LaF₃ layer, an organic layer and an inorganic layer.

16. The organic thin film transistor of claim 15, wherein the inorganic layer is formed of one of silicon nitride and silicon oxide.

17. The organic thin film transistor of claim 11, wherein the passivation layer covers the source and drain electrodes and the organic semiconductor layer formed between the source and drain electrodes.

18. The organic thin film transistor of claim 11, wherein the LaF₃ layer has a thickness of at least 30 nm.

19. The organic thin film transistor of claim 11, wherein the LaF₃ layer is formed using one deposition method selected from the group consisting of physical vapor deposition (PVD) including ion beam deposition and chemical vapor deposition (CVD) including low pressure CVD (LPCVD) and plasma enhanced CVD (PECVD).