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Low-power programmable low-drop-out voltage regulator system and methods

  • US 20070046271A1
  • Filed: 08/31/2005
  • Published: 03/01/2007
  • Est. Priority Date: 08/31/2005
  • Status: Active Grant
First Claim
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1. A low-drop-out voltage regulator (LDO), comprising:

  • a local reference generator circuit that receives a voltage input signal (VIN) and outputs a reference voltage signal (VREF);

    a buffer circuit that receives the reference voltage signal (VREF) and outputs an output voltage signal (VOUT) at an LDO output;

    an attenuator circuit located between the local reference generator circuit and the buffer circuit; and

    a comparison device that receives the output voltage signal (VOUT) and an accurate reference voltage signal (REF), compares the output voltage signal (VOUT) to the accurate reference voltage signal (REF), and outputs an adjustment signal that signifies tuning necessary in the LDO to adjust output voltage signal (VOUT) in the direction of a value of the accurate reference voltage signal (REF), wherein a gain of the buffer circuit is adjusted if the output voltage signal (VOUT) has a value lower than the accurate reference voltage signal (REF); and

    wherein at least one of a gain of the attenuator circuit and a gain of the buffer circuit is adjusted if the output voltage signal (VOUT) has a value higher than the accurate reference voltage signal (REF).

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