Magnetic devices and techniques for formation thereof

• US 20070048950A1
• Filed: 08/23/2005
• Published: 03/01/2007
• Est. Priority Date: 08/23/2005
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Kanakasabapathy, Sivananda, Gaidis, Michael
• Granted Patent: US 7,399,646 B2
• Time in Patent Office: Days
• US Class Current: 438/300
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: H10N 50/10 Magnetoresistive devices

Abstract

Techniques for forming a magnetic device are provided. In one aspect, a method of forming a via hole self-aligned with a magnetic device comprises the following steps. A dielectric layer is formed over at least a portion of the magnetic device. The dielectric layer is configured to have an underlayer proximate to the magnetic device which comprises a first material, and an overlayer on a side of the underlayer opposite the magnetic device which comprises a second material. The first material is different from the second material. In a first etching phase, a first etchant is used to etch the dielectric layer, beginning with the overlayer, and through the overlayer. In a second etching phase, a second etchant which is selective for etching the underlayer is used to etch the dielectric layer through the underlayer.

Claims

1. A method of forming a via hole self-aligned with a magnetic device, the method comprising the steps of:

forming a dielectric layer over at least a portion of the magnetic device, the dielectric layer comprising an underlayer formed proximate to the magnetic device, the underlayer including a first material, and an overlayer formed on an upper surface of the underlayer opposite the magnetic device, the overlayer including a second material which is different from the first material;

in a first etching phase, etching the dielectric layer using a first etchant, beginning with the overlayer and at least partially through the overlayer; and

in a second etching phase, etching the dielectric layer using a second etchant which is selective for the underlayer to etch the dielectric layer at least partially through the underlayer.

2. The method of claim 1, wherein the magnetic device comprises a magnetic tunnel junction.

3. The method of claim 1, further comprising the steps of:

detecting when the first etchant reaches the underlayer; and

ending the first etching phase once the first etchant reaches the underlayer.

4. The method of claim 3, wherein the detecting step further comprises the step of using optical emission tracing to optically detect that the first etchant has reached the underlayer.

5. The method of claim 4, wherein the step of using optical emission tracing comprises optically detecting characteristics in the underlayer that are substantially absent in the overlayer.

6. The method of claim 1, wherein the first material comprises at least one of silicon nitride and silicon carbon nitride.

7. The method of claim 1, wherein the first material comprises silicon oxide.

8. The method of claim 1, wherein the first etchant comprises a carbon-based plasma material.

9. The method of claim 1, wherein the second etchant comprises a CH₃F/O₂-based material.

10. The method of claim 1, wherein the second etchant comprises a NF₃/O₂/NH₃-based material.

11. The method of claim 1, wherein the step of forming a dielectric layer further comprises the step of depositing the underlayer so as to form one or more spires at a vertical distance above the magnetic device.

12. The method of claim 11, wherein the underlayer is deposited using high-density plasma, chemical vapor deposition.

13. The method of claim 1, wherein a spacer material is present around at least a portion of at least one side of the magnetic device.

14. The method of claim 13, wherein the spacer material comprises silicon oxide.

15. The method of claim 1, further comprising the steps of:

employing a hardmask during patterning of the magnetic device, the hardmask comprising a same material as the underlayer; and

during the second etching phase, etching the dielectric layer through the underlayer and through the hardmask.

16. The method of claim 1, further comprising the step of metallizing the via hole.

17. The method of claim 16, wherein the via hole is metallized using damascene processing.

18. A magnetic device, comprising:

a magnetic tunnel junction;

a dielectric layer formed over at least a portion of the magnetic tunnel junction, the dielectric layer being configured to have an underlayer proximate to the magnetic tunnel junction, and an overlayer on a side of the underlayer opposite the magnetic tunnel junction; and

a via hole running substantially vertically through the dielectric layer and being self-aligned with the magnetic tunnel junction.

19. An integrated circuit including at least one magnetic device, the at least one magnetic device comprising:

a magnetic tunnel junction;

a dielectric layer formed over at least a portion of the magnetic tunnel junction, the dielectric layer being configured to have an underlayer proximate to the magnetic tunnel junction, and an overlayer on a side of the underlayer opposite the magnetic tunnel junction; and

a via hole running substantially vertically through the dielectric layer and being self-aligned with the magnetic tunnel junction.