Microfeature workpieces and methods for forming interconnects in microfeature workpieces

• US 20070049016A1
• Filed: 09/01/2005
• Published: 03/01/2007
• Est. Priority Date: 09/01/2005
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Dando, Ross, Hiatt, William
• Granted Patent: US 7,863,187 B2
• Time in Patent Office: Days
• US Class Current: 438/667
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2224/13025 the bump connector being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/5384 Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors H01L23/5383, H01L23/5385 take precedence; pins attached to insulating substrates H01L23/49811

Abstract

Methods for forming interconnects in microfeature workpieces, and microfeature workpieces having such interconnects are disclosed herein. The microfeature workpieces may have a terminal and a substrate with a first side carrying the terminal and a second side opposite the first side. In one embodiment, a method includes (a) constructing an electrically conductive interconnect extending from the terminal to at least an intermediate depth in the substrate with the interconnect electrically connected to the terminal, and (b) removing material from the second side of the substrate so that a portion of the interconnect projects from the substrate.

Claims

1. A method for forming an interconnect in a microfeature workpiece, the microfeature workpiece including a terminal and a substrate with a first side carrying the terminal and a second side opposite the first side, the method comprising:

constructing an electrically conductive interconnect extending from the terminal to at least an intermediate depth in the substrate with the interconnect electrically connected to the terminal; and

removing material from the second side of the substrate so that a portion of the interconnect projects from the substrate and the interconnect has an exposed surface.

2. The method of claim 1 wherein:

constructing the electrically conductive interconnect comprises forming an interconnect having a conductive fill material in a hole in the substrate and a conductive layer in the hole between the conductive fill material and the substrate, with the conductive fill material and the conductive layer extending from the terminal to the at least intermediate depth in the substrate;

removing material from the second side of the substrate comprises (a) thinning the substrate from the second side so that a section of the interconnect is exposed, and (b) selectively etching the substrate so that the portion of the interconnect projects from the substrate; and

the method further comprises (a) removing a section of the conductive fill material from the portion of the interconnect so that the conductive fill material is recessed relative to the conductive layer, (b) applying a dielectric layer to the second side of the substrate and the portion of the interconnect after removing the section of the conductive fill material, (c) removing at least a section of the dielectric layer covering the portion of the interconnect to expose a section of the interconnect, and (d) forming a conductive member on the section of the interconnect.

3. The method of claim 1 wherein removing material from the second side of the substrate comprises:

thinning the substrate from the second side so that a section of the interconnect is exposed; and

selectively etching the substrate so that the portion of the interconnect projects from the substrate.

4. The method of claim 1 wherein:

constructing the electrically conductive interconnect comprises forming an interconnect having a conductive fill material in a hole in the substrate and a conductive layer in the hole between the conductive fill material and the substrate, with the conductive fill material and the conductive layer extending from the terminal to the at least intermediate depth in the substrate; and

the method further comprises removing a section of the conductive fill material from the portion of the interconnect so that the conductive fill material is recessed relative to the conductive layer.

5. The method of claim 1, further comprising applying a dielectric layer to the second side of the substrate and the portion of the interconnect after removing material from the second side of the substrate.

6. The method of claim 1, further comprising:

applying a dielectric layer to the second side of the substrate and the portion of the interconnect after removing material from the second side of the substrate; and

removing at least a section of the dielectric layer covering the portion of the interconnect to expose a section of the interconnect.

7. The method of claim 1, further comprising forming a conductive member on the portion of the conductive interconnect.

8. The method of claim 1, further comprising plating a conductive cap onto the portion of the conductive interconnect.

9. The method of claim 1 wherein removing material from the second side of the substrate comprises selectively etching the substrate so that the portion of the interconnect projects between approximately 5 and 10 microns from the substrate.

10. The method of claim 1 wherein removing material from the second side of the substrate comprises at least one of grinding, chemical-mechanical polishing, mechanical polishing, or chemical polishing the substrate.

11. The method of claim 1 wherein removing material from the second side of the substrate occurs after constructing the electrically conductive interconnect.

12. A method for forming an interconnect in a microfeature workpiece, the method comprising:

providing a microfeature workpiece having (a) a substrate with a first side and a second side opposite the first side, (b) a terminal carried by the first side of the substrate, and (c) an electrically conductive interconnect extending from the terminal through the substrate and projecting from the second side of the substrate;

applying a dielectric layer to the second side of the substrate and the portion of the interconnect projecting from the second side of the substrate; and

removing a section of the dielectric layer to expose a surface of the interconnect with the interconnect intersecting a plane defined by the remaining section of the dielectric layer.

13. The method of claim 12 wherein providing the microfeature workpiece comprises:

constructing the electrically conductive interconnect in the substrate with the interconnect extending from the terminal to at least an intermediate depth in the substrate; and

removing material from the second side of the substrate so that the portion of the interconnect projects from the substrate.

14. The method of claim 12 wherein applying the dielectric layer comprises depositing parylene across the second side of the substrate and the portion of the interconnect.

15. The method of claim 12 wherein removing the section of the dielectric layer comprises polishing the workpiece.

16. The method of claim 12 wherein removing the section of the dielectric layer comprises polishing the workpiece to form a generally planar surface across the workpiece.

17. The method of claim 12, further comprising forming a conductive member on the exposed surface of the interconnect.

18. The method of claim 12 wherein removing the section of the dielectric layer comprises removing the section of the dielectric layer without photolithography.

19. The method of claim 12 wherein removing the section of the dielectric layer comprises:

removing a first portion of the section of the dielectric layer in a first process; and

removing a second portion of the section of the dielectric layer in a second process different than the first process.

20. A method for forming an interconnect in a microfeature workpiece, the microfeature workpiece including a terminal and a substrate with a first side carrying the terminal and a second side opposite the first side, the method comprising:

forming an electrically conductive interconnect having a first portion at the terminal and a second portion at an intermediate depth in the substrate, the electrically conductive interconnect being electrically connected to the terminal;

thinning the substrate from the second side to at least the second portion of the interconnect;

applying a dielectric layer to the second side of the substrate and the second portion of the interconnect after thinning the substrate; and

exposing a surface of the second portion of the interconnect without photolithography.

21. The method of claim 20 wherein thinning the substrate comprises removing material from the second side of the substrate so that the second portion of the interconnect projects from the substrate.

22. The method of claim 20, further comprising selectively etching the substrate so that the second portion of the interconnect projects from the substrate.

23. The method of claim 20 wherein:

forming the electrically conductive interconnect comprises constructing an interconnect having a conductive fill material in a hole in the substrate and a conductive layer in the hole between the conductive fill material and the substrate, with the conductive fill material and the conductive layer extending from the terminal to the at least intermediate depth in the substrate; and

the method further comprises removing a section of the conductive fill material from the portion of the interconnect so that the conductive fill material is recessed relative to the conductive layer.

24. The method of claim 20, further comprising forming a conductive member on the exposed surface of the conductive interconnect.

25. The method of claim 20 wherein exposing the surface of the second portion of the interconnect comprises at least one of grinding, chemical-mechanical polishing, mechanical polishing, or chemical polishing a section of the dielectric layer on the second portion of the interconnect.

26. A microfeature workpiece, comprising:

a substrate having a first side and a second side opposite the first side;

a microelectronic die formed in and/or on the substrate, the die including a terminal at the first side of the substrate and an integrated circuit operably coupled to the terminal; and

an electrically conductive interconnect extending from the terminal through the substrate and projecting from the second side of the substrate, wherein the interconnect is electrically coupled to the terminal and has an exposed surface at the second side of the substrate.

27. The microfeature workpiece of claim 26 wherein:

the substrate further comprises a hole;

the electrically conductive interconnect comprises a conductive fill material in the hole and a conductive layer in the hole between the conductive fill material and the substrate;

the conductive fill material and the conductive layer each include an exposed surface; and

the exposed surface of the conductive fill material is recessed relative to the exposed surface of the conductive layer.

28. The microfeature workpiece of claim 26, further comprising a dielectric structure covering the second side of the substrate and the portion of the interconnect projecting from the substrate.

29. The microfeature workpiece of claim 26, further comprising a dielectric structure covering the second side of the substrate, wherein the exposed surface of the interconnect is not covered by the dielectric structure.

30. The microfeature workpiece of claim 26, further comprising a dielectric structure covering the second side of the substrate and having an exterior surface, wherein the exposed surface of the interconnect is not covered by the dielectric structure, and wherein a portion of the interconnect projects from the exterior surface of the dielectric structure.

31. The microfeature workpiece of claim 26, further comprising a dielectric structure covering the second side of the substrate and having an exterior surface, wherein the exposed surface of the interconnect is not covered by the dielectric structure, and wherein the exposed surface of the interconnect is generally coplanar with the exterior surface of the dielectric structure.

32. The microfeature workpiece of claim 26, further comprising a layer of parylene disposed on the second side of the substrate.

33. The microfeature workpiece of claim 26, further comprising a conductive member formed on the portion of the interconnect projecting from the substrate.

34. The microfeature workpiece of claim 26, further comprising a conductive cap formed on the portion of the interconnect projecting from the substrate.

35. The microfeature workpiece of claim 26 wherein the interconnect projects between approximately 5 and 10 microns from the substrate.

36. The microfeature workpiece of claim 26 wherein:

the substrate further comprises a hole;

the electrically conductive interconnect comprises a conductive fill material in the hole, a conductive layer in the hole between the conductive fill material and the substrate, and a recess at the second side of the substrate; and

the workpiece further comprises a dielectric material disposed in the recess.

37. A microfeature workpiece, comprising:

a substrate having a first side and a second side opposite the first side;

a microelectronic die formed in and/or on the substrate, the die including a terminal at the first side of the substrate and an integrated circuit operably coupled to the terminal;

a hole extending through the terminal and the substrate;

a dielectric layer on the second side of the substrate defining a plane; and

an electrically conductive interconnect including a conductive fill material in the hole and a conductive layer in the hole between the conductive fill material and the substrate, both the conductive fill material and the conductive layer being electrically coupled to the terminal and extending from the terminal through the substrate and projecting from the substrate such that the conductive fill material and the conductive layer intersect the plane.

38. The microfeature workpiece of claim 37 wherein:

the conductive fill material and the conductive layer each include an exposed surface; and

the exposed surface of the conductive fill material is recessed relative to the exposed surface of the conductive layer.

39. The microfeature workpiece of claim 37 wherein:

the conductive fill material and the conductive layer each include an exposed surface;

the exposed surface of the conductive fill material is recessed relative to the exposed surface of the conductive layer such that the conductive fill material and the conductive layer define a recess in the interconnect; and

the dielectric layer further includes a section disposed in the recess.

40. The microfeature workpiece of claim 37 wherein:

the conductive fill material and the conductive layer each include an exposed surface; and

the exposed surface of the conductive fill material is generally coplanar with the exposed surface of the conductive layer.

41. The microfeature workpiece of claim 37 wherein the dielectric layer further covers the interconnect.

42. The microfeature workpiece of claim 37 wherein the dielectric layer has an exterior surface, and wherein the interconnect includes a portion projecting from the exterior surface.

43. The microfeature workpiece of claim 37 wherein the dielectric layer has an exterior surface, and wherein the interconnect includes an exposed surface generally coplanar with the exterior surface.

44. The microfeature workpiece of claim 37, further comprising a conductive member formed on the portion of the interconnect that projects from the substrate.

45. A microfeature workpiece, comprising:

a substrate having a first side and a second side opposite the first side;

a microelectronic die formed in and/or on the substrate, the die including a terminal at the first side of the substrate and an integrated circuit operably coupled to the terminal; and

an electrically conductive interconnect including a conductive fill material in the hole and a conductive layer in the hole between the conductive fill material and the substrate, both the conductive fill material and the conductive layer being electrically coupled to the terminal and extending from the terminal through the substrate and projecting from the substrate, wherein the conductive fill material is recessed relative to the conductive layer at the second side of the substrate.

46. The microfeature workpiece of claim 45 wherein the conductive fill material and the conductive layer each include an exposed surface.

47. The microfeature workpiece of claim 45, further comprising a dielectric layer disposed on the second side of the substrate.

48. The microfeature workpiece of claim 45, further comprising a dielectric layer disposed on the second side of the substrate and including a section disposed in a recess defined by the conductive fill material and the conductive layer.

49. The microfeature workpiece of claim 45, further comprising a dielectric layer covering the interconnect.

50. The microfeature workpiece of claim 45, further comprising a dielectric layer covering the second side of the substrate, wherein the dielectric layer has an exterior surface and the interconnect includes a portion projecting from the exterior surface.

51. The microfeature workpiece of claim 45, further comprising a dielectric layer covering the second side of the substrate, wherein the dielectric layer has an exterior surface and the interconnect includes an exposed surface generally coplanar with the exterior surface.

52. The microfeature workpiece of claim 45, further comprising a conductive member formed on the portion of the interconnect that projects from the substrate.