Adaptive radio transceiver with an antenna matching circuit

• US 20070049205A1
• Filed: 01/31/2006
• Published: 03/01/2007
• Est. Priority Date: 10/21/1999
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Ahmadreza Rofougaran, Maryam Rofougaran, Shervin Moloudi
• Inventors: Rofougaran, Maryam, Rofougaran, Ahmadreza, Moloudi, Shervin
• Granted Patent: US 7,349,673 B2
• Time in Patent Office: Days
• US Class Current: 455/67.110
• CPC Class Codes: H03B 21/01 by beating unmodulated signals of different frequencies
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 2200/318 A matching circuit being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 2203/45386 the AAC comprising one or more coils in the source circuit
• CPC Class Codes: H03F 2203/45526 the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45528 the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45638 the LC comprising one or more coils
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03G 11/00 Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
• CPC Class Codes: H03G 3/001 Digital control of analog signals
• CPC Class Codes: H03H 11/126 using a single operational amplifier H03H11/1204 takes precedence; parallel-T filters H03H11/1295
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 11/22 providing two or more phase shifted output signals, e.g. n-phase output
• CPC Class Codes: H03H 11/344 : Duplexers
• CPC Class Codes: H03H 2011/0494 : Complex filters
• CPC Class Codes: H03H 21/0001 : Analogue adaptive filters
• CPC Class Codes: H03H 21/0012 : Digital adaptive filters
• CPC Class Codes: H03H 2210/025 : Capacitor
• CPC Class Codes: H03H 2210/036 : Stepwise
• CPC Class Codes: H03H 7/42 : Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
• CPC Class Codes: H03J 2200/10 : Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03L 7/099 : concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/18 : using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence
• CPC Class Codes: H04B 17/104 : of other parameters, e.g. DC offset, delay or propagation times
• CPC Class Codes: H04B 17/14 : of the whole transmission and reception path, e.g. self-test loop-back
• CPC Class Codes: H04B 17/19 : Self-testing arrangements

Abstract

An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Claims

1-31. -31. (canceled)

32. A method of wireless communications via at least one antenna, comprising:

continuously coupling operatively, with a substantially constant impedance, at least one output of a transmitter to at least one input of a receiver of a wireless communications device through at least one coupling circuit of the wireless communications device, each coupling circuit comprising a first node and a second node;

operatively coupling a transmission signal to the at least one antenna via the at least one output of the transmitter;

operatively coupling one of the at least one output of the transmitter to one of the first node of the at least one coupling circuit;

operatively coupling a receive signal to the at least one input of the receiver via the at least one antenna; and

operatively coupling one of the at least one input of the receiver to one of the second node of the at least one coupling circuit.

33. The method according to claim 32, comprising:

disabling the at least one output of the transmitter when the at least one input of the receiver is enabled; and

disabling the at least one input of the receiver when the at least one output of the transmitter is enabled.

34. The method according to claim 32,

wherein the transmitter comprises a power amplifier comprising one of the at least one output of the transmitter, and

wherein the receiver comprises a low noise amplifier comprising one of the at least one input of the receiver.

35. The method according to claim 34,

wherein one of the at least one output of the transmitter and one of the at least one input of the receiver comprise a differential line, and

wherein the method comprises interfacing the differential line to the at least one antenna using a matching circuit.

36. The method according to claim 35, wherein the at least one antenna comprises a single-ended antenna.

37. The method according to claim 35, wherein the matching circuit comprises a series capacitor and a shunt inductor operatively coupled to one of the differential lines, and a series inductor and a shunt capacitor operatively coupled to a second one of the differential lines.

38. The method according to claim 37, comprising:

disabling the at least one output of the transmitter when the at least one input of the receiver is enabled; and

disabling the at least input of the receiver when the at least one output of the transmitter is enabled.

39. The method according to claim 38, wherein the series capacitor, the shunt inductor, the series inductor and the shunt capacitor are arranged to substantially match an impedance of the antenna.

40. The method of claim 39, comprising:

compensating for a first capacitance of the at least one input of the receiver via a circuital arrangement of the series capacitor, the shunt inductor, the series inductor and the shunt capacitor when the at least one input of the receiver is disabled; and

compensating for a second capacitance of the at least one output of the transmitter via the circuital arrangement of the series capacitor, the shunt inductor, the series inductor and the shunt capacitor when the at least one output of the transmitter is disabled.

41. The method according to claim 37, wherein the at least one output of the transmitter comprises a differential transistor pair, each transistor of the differential transistor pair comprising a drain that is operatively coupled to a different one of the differential lines.

42. The method according to claim 41, wherein the at least one input of the receiver comprises a second differential transistor pair, each transistor of the second differential transistor pair comprising a gate that is operatively coupled to a different one of the differential lines.

43. The method according to claim 37, wherein the at least one input of the receiver comprises a differential transistor pair, each transistor of the differential transistor pair comprising a gate that operatively coupled to a different one of the differential lines.

44. The method according to claim 43, wherein the at least one output of the transmitter comprises a second differential transistor pair, each transistor of the second differential transistor pair comprising a drain that is operatively coupled to a different one of the differential lines.

52. The method according to claim 32, wherein the wireless communications device performs orthogonal frequency division multiplexing.

53. The method according to claim 32, wherein the wireless communications device performs spread spectrum modulation.

54. The method according to claim 32, wherein the wireless communications device performs frequency hopping.

55. The method according to claim 32, wherein the wireless communications device performs direct sequence spread spectrum modulation.

64. The method according to claim 32, wherein the transmitter and the receiver are integrated on a single integrated circuit chip.

65. The method according to claim 64, wherein the at least one coupling circuit is integrated on the single integrated circuit chip.

66. The method according to claim 32, wherein the transmitter comprises CMOS circuitry.

73. The method according to claim 32, wherein the wireless communications device performs orthogonal frequency division multiplexing and spread spectrum modulation.

45. A wireless communications device having a transmitter output and a receiver input, comprising:

means for continuously coupling, with a substantially constant impedance, a transmitter output of a transmitter to a receiver input of a receiver;

means for disabling the receiver input by powering off at least a portion of the receiver;

means for transmitting a transmission signal from the transmitter output to an antenna with the receiver input disabled;

means for disabling the transmitter output by powering off at least a portion of the transmitter and enabling the receiver input by powering on at least a portion of the receiver; and

means for receiving a receive signal from the antenna at the receiver input with the transmitter output disabled.

46. The wireless communications device according to claim 45,

wherein the transmitter output and receiver input comprise a differential line, and

the wireless communications device comprising means for matching the differential line to the antenna.

47. The wireless communications device according to claim 46, wherein the matching means comprises

means for shifting a first signal on one of the differential lines by 90 degrees,

means for shifting a second signal on a second one of the differential lines by 90 degrees in an opposite direction, and

means for combining the shifted first signal and the shifted second signal.

48. The wireless communications device according to claim 46, wherein the matching means comprises means for compensating for a capacitance resulting from the receiver being disabled or from the transmitter being disabled.

56. The wireless communications device according to claim 45, wherein the wireless communications device performs orthogonal frequency division multiplexing.

57. The wireless communications device according to claim 45, wherein the wireless communications device performs spread spectrum modulation.

58. The wireless communications device according to claim 45, wherein the wireless communications device performs frequency hopping spread spectrum modulation.

59. The wireless communications device according to claim 45, wherein the wireless communications device that performs direct sequence spread spectrum modulation.

67. The wireless communications device according to claim 45, wherein the transmitter and the receiver are integrated on a single integrated circuit chip.

68. The wireless communications device according to claim 67, wherein the continuously coupling means is integrated on the single integrated circuit chip.

69. The wireless communications device according to claim 45, wherein the transmitter comprises CMOS circuitry.

74. The wireless communications device according to claim 45, wherein the wireless communications device performs orthogonal frequency division multiplexing and spread spectrum modulation.

49. A method of wireless communications,

(a) operatively coupling a transmission signal to an antenna via an output of a transmitter of a wireless communications device;

(b) operatively coupling a receiver signal to an input of a receiver of the wireless communications device via the antenna;

(c) continuously coupling operatively, with a substantially constant impedance, the output of the transmitter to the input of the receiver via a coupling circuit of the wireless communications device; and

(d) matching an impedance of the operatively coupled output of the transmitter and the input of the receiver to an impedance of the antenna.

50. The method according to claim 49 wherein (c) comprises presenting the substantially constant impedance to the output of the transmitter when the receiver is disabled and the transmitter is enabled.

51. The method according to claim 49 wherein (c) comprises presenting the substantially constant impedance to the input of the receiver when the transmitter is disabled and the receiver is enabled.

60. The method according to claim 49, wherein the wireless communications device performs orthogonal frequency division multiplexing.

61. The method according to claim 49, wherein the wireless communications device performs spread spectrum modulation.

62. The method according to claim 49, wherein the wireless communications device performs frequency hopping spread spectrum modulation.

63. The method according to claim 49, wherein the wireless communications device performs direct sequence spread spectrum modulation.

70. The method according to claim 49, wherein the transmitter and the receiver are integrated on a single integrated circuit chip.

71. The method according to claim 70, wherein the coupling circuit is integrated on the single integrated circuit chip.

72. The method according to claim 49, wherein the transmitter comprises CMOS circuitry.

75. The method according to claim 49, wherein the wireless communications device performs orthogonal frequency division multiplexing and spread spectrum modulation.