Augmented instruction set for proactive synchronization within a computer system
First Claim
1. A method comprising:
- a processor executing a set of instructions to request exclusive access to a plurality of memory resources, wherein the set of instructions includes an ACQUIRE instruction;
storing addresses referenced by the set of instructions within a buffer;
wherein, in response to execution of the ACQUIRE instruction, sending the addresses referenced by the set of instructions, as a set, to be compared to other addresses to which exclusive access to memory addresses has been granted.
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Accused Products
Abstract
Providing proactive synchronization in a computer system may include providing an augmented instruction set with additional synchronizing instructions. Therefore, a method includes a processor executing a set of instructions to request exclusive access to a plurality of memory resources. The set of instructions includes an ACQUIRE instruction. In addition, the method may include storing addresses referenced by the set of instructions within a buffer. Further, the method may include sending the addresses referenced by the set of instructions, as a set, to be compared to other addresses to which exclusive access to memory addresses has been granted in response to execution of the ACQUIRE instruction.
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Citations
26 Claims
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1. A method comprising:
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a processor executing a set of instructions to request exclusive access to a plurality of memory resources, wherein the set of instructions includes an ACQUIRE instruction;
storing addresses referenced by the set of instructions within a buffer;
wherein, in response to execution of the ACQUIRE instruction, sending the addresses referenced by the set of instructions, as a set, to be compared to other addresses to which exclusive access to memory addresses has been granted. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A processor coupled to one or more memories and to one or more additional processors, the processor comprising:
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an execution pipeline configured to execute a set of instructions to request exclusive access to a given memory, wherein the set of instructions includes an ACQUIRE instruction;
an interface unit coupled to the instruction pipeline and configured to store addresses referenced by the set of instructions within a buffer;
wherein, in response to execution of the ACQUIRE instruction, the interface unit is further configured to send the addresses, as a set, to be compared to other addresses to which exclusive access to memory addresses has been granted. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A computer readable medium including a set of program instructions executable by a processor to:
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request exclusive access to a plurality of memory resources, wherein the set of program instructions includes an ACQUIRE instruction;
store addresses referenced by the set of program instructions within a buffer;
send the addresses referenced by the set of instructions as a set, to be compared to other addresses to which exclusive access to memory addresses has been granted in response to execution of the ACQUIRE instruction. - View Dependent Claims (22, 23, 24, 25, 26)
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Specification