Method for creating critical section code using a software wrapper for proactive synchronization within a computer system

• US 20070050561A1
• Filed: 08/23/2006
• Published: 03/01/2007
• Est. Priority Date: 08/23/2005
• Status: Abandoned Application

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Alsup, Mitchell
• Application Number:
  US11/508,494
• Publication Number:
  US 20070050561A1
• Time in Patent Office: Days
• US Class Current: 711/145
• CPC Class Codes: G06F 12/0815 Cache consistency protocols
• CPC Class Codes: G06F 12/0831 using a bus scheme, e.g. with bus monitoring or watching means
• CPC Class Codes: G06F 12/0862 with prefetch
• CPC Class Codes: G06F 12/126 with special data handling, e.g. priority of data or instructions, handling errors or pinning
• CPC Class Codes: G06F 9/3004 to perform operations on memory
• CPC Class Codes: G06F 9/30047 Prefetch instructions; cache control instructions
• CPC Class Codes: G06F 9/30087 Synchronisation or serialisation instructions
• CPC Class Codes: G06F 9/3017 Runtime instruction translation, e.g. macros
• CPC Class Codes: G06F 9/3842 Speculative instruction execution
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms

Abstract

A method for creating critical section code using a software wrapper includes creating a high-level expression for requesting exclusive access to one or more memory resource addresses. The high-level expression may include an ACQUIRE function call that includes one or more arguments associated with the one or more memory resource addresses. The method may also include creating a low-level set of instructions by compiling the high-level expression into native instructions. The low-level set of instructions includes a specification phase for requesting exclusive access to the one or more memory resource addresses. In response to compiling the ACQUIRE function call, the method includes creating the specification phase of code, which may include generating an instruction stream having LOCK-based memory reference instructions having a LOCK prefix on the one or more arguments, and inserting an ACQUIRE instruction into the instruction stream.

Claims

1. A method comprising:

creating a high-level expression for requesting exclusive access to one or more memory resource addresses, wherein the high-level expression includes an ACQUIRE pseudo function call comprising one or more arguments associated with the one or more memory resource addresses; and

creating a low-level set of instructions by compiling the high-level expression, wherein the low-level set of instructions includes a specification phase for requesting exclusive access to the one or more memory resource addresses;

wherein in response to compiling the ACQUIRE pseudo function call, creating the specification phase of code including;

generating an instruction stream including LOCK-based memory reference instructions having a LOCK prefix based on computations performed on the one or more arguments; and

inserting an ACQUIRE instruction into the instruction stream.

2. The method as recited in claim 1, wherein the LOCK-based memory instructions comprise LOCK MOV instructions for loading data from one or more memory locations to one or more respective registers.

3. The method as recited in claim 1, wherein the LOCK-based memory instructions comprise a LOCK PREFETCHW instruction.

4. The method as recited in claim 1, wherein the low-level set of instructions includes code for creating an atomic phase of code, and wherein creating the atomic phase comprises inserting a RELEASE instruction into the instruction stream after one or more MOV instructions for storing data to one or more memory locations from one or more respective registers.

5. The method as recited in claim 4, wherein creating the atomic phase further comprises compiling a MODIFY pseudo function call comprising one or more additional arguments specifying the one or more memory resource modifications.

6. The method as recited in claim 1, wherein the specification phase code further comprises inserting a conditional jump instruction in the instruction stream after the AQUIRE instruction.

7. A method comprising:

providing to a compiler, a high-level expression including an ACQUIRE pseudo function call comprising one or more arguments associated with one or more memory resource addresses; and

the compiler creating a low-level set of instructions from the high-level expression, wherein the low-level set of instructions includes a specification phase for requesting exclusive access to the one or more memory resource addresses;

wherein the specification phase of code includes;

an instruction stream including LOCK-based memory instructions having a LOCK prefix based on computations performed on the one or more arguments; and

an ACQUIRE instruction inserted into the instruction stream after the LOCK-based memory instructions.

8. The method as recited in claim 7, wherein the LOCK-based memory instructions comprise LOCK MOV instructions for loading data from one or more memory locations to one or, more respective registers.

9. The method as recited in claim 7, wherein the LOCK-based memory instructions comprise a LOCK PREFETCHW instruction.

10. The method as recited in claim 7, wherein the low-level set of instructions includes code for creating an atomic phase of code, and wherein creating the atomic phase comprises inserting a RELEASE instruction into the instruction stream after one or more MOV instructions for storing data to one or more memory locations from one or more respective registers.

11. The method as recited in claim 10, wherein creating the atomic phase further comprises compiling a MODIFY pseudo function call comprising one or more additional arguments specifying the one or more memory resource modifications.

12. The method as recited in claim 10, wherein creating the atomic phase of code further comprises inserting a conditional jump instruction into the instruction stream after the AQUIRE instruction.

13. A computer readable medium including program instructions executable by a processor to:

create a low-level set of instructions by compiling a high-level expression that includes an ACQUIRE pseudo function call comprising one or more arguments associated with one or more memory resource addresses;

wherein the low-level set of instructions includes a critical code section for requesting exclusive access to the one or more memory resource addresses;

wherein in response to compiling the ACQUIRE pseudo function, the program instructions are further executable by the processor to;

generate an instruction stream including LOCK-based memory instructions having a LOCK prefix based on computations performed on the one or more arguments;

insert an ACQUIRE instruction into the instruction stream.

14. The computer readable medium as recited in claim 13, wherein the LOCK-based memory instructions comprise LOCK MOV instructions for loading data from one or more memory locations to one or more respective registers.

15. The computer readable medium as recited in claim 13, wherein the LOCK-based memory instructions comprise a LOCK PREFETCHW instruction.

16. The computer readable medium as recited in claim 13, wherein the program instructions are further executable by the processor to insert a RELEASE instruction into the instruction stream after one or more MOV instructions for storing data to one or more memory locations from one or more respective registers.

17. The computer readable medium as recited in claim 13, wherein the program instructions are further executable by the processor to create a low-level set of instructions by compiling a high-level expression that includes a MODIFY pseudo function call comprising one or more additional arguments specifying one or more memory resources to be modified

18. The computer readable medium as recited in claim 13, wherein the program instructions are further executable by the processor to insert a conditional jump instruction in the instruction stream after the AQUIRE instruction.