Power sparing synchronous apparatus

• US 20070050581A1
• Filed: 03/17/2006
• Published: 03/01/2007
• Est. Priority Date: 08/29/2005
• Status: Active Grant

• Current Assignee: The Invention Science Fund I, L.L.C. (Intellectual Ventures LLC)
• Original Assignee: Searete LLC (Intellectual Ventures LLC)
• Inventors: Mangione-Smith, William
• Granted Patent: US 7,653,834 B2
• Time in Patent Office: Days
• US Class Current: 711/163
• CPC Class Codes: G06F 1/263 Arrangements for using multiple switchable power supplies, e.g. battery and AC G06F1/30 takes precedence
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: G06F 11/0706 the processing taking place on a specific hardware platform or in a specific software environment
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/1405 at machine instruction level
• CPC Class Codes: G06F 11/1407 Checkpointing the instruction stream
• CPC Class Codes: G06F 11/3471 Address tracing
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Embodiments include a system, an apparatus, a device, and a method. An apparatus includes a synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The apparatus also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The apparatus includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The apparatus also includes a power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.

Claims

1. An apparatus comprising:

a synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage;

an error detector operable to detect an incidence of a computational error occurring in the first subcircuit;

a controller operable to change the first power plane voltage based upon the detected incidence of a computational error; and

a power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.

2. The apparatus of claim 1, wherein the synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage further includes:

a synchronous processor including a first processor core powered by a first power plane having a first power plane voltage and a second processor core powered by a second power plane having a second power plane voltage.

3. The apparatus of claim 1, wherein the synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage further includes:

a synchronous uniprocessor including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage.

4. The apparatus of claim 1, wherein the error detector operable to detect an incidence of a computational error occurring in the first subcircuit includes:

a hardware-implemented error detector operable to detect an incidence of a computational error occurring in the first subcircuit.

5. The apparatus of claim 1, wherein the power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller includes:

a power supply configured to electrically couple with a replaceable portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.

6. The apparatus of claim 1, wherein the power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller includes:

a power supply configured to electrically couple with a selectively replaceable portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.

7. The apparatus of claim 1, wherein the power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller includes:

a power supply configured to electrically couple with a rechargeable portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.

8. The apparatus of claim 1, wherein the power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller includes:

a power supply configured to electrically couple with at least one of a battery, a rechargeable battery, a replaceable battery, a fuel cell, an energy harvesting system, a capacitor, and/or a selectively removable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.

9. The apparatus of claim 1, wherein the power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller includes:

a power supply electrically coupled with at least one of a battery, a rechargeable battery, a replaceable battery, a fuel cell, an energy harvesting system, a capacitor, and/or a selectively removable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.

10. The apparatus of claim 1, wherein the power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller includes:

a power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller and another selected voltage to the second power plane.

11. The apparatus of claim 1, wherein the power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller includes:

at least one of a DC/DC regulated, a controllable, and/or programmable power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.

12. A method comprising:

decreasing a voltage received at a first power plane from a power supply that includes a portable energy source, the first power plane being a component of a synchronous circuit that includes a first subcircuit powered by the first power plane and a second subcircuit powered by a second power plane having a second power plane voltage;

detecting an incidence of a computational error occurring in the first subcircuit; and

in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source.

13. The method of claim 12, wherein the decreasing a voltage received at a first power plane from a power supply that includes a portable energy source, the first power plane being a component of a synchronous circuit that includes a first subcircuit powered by the first power plane and a second subcircuit powered by a second power plane having a second power plane voltage further includes:

decreasing a voltage received at a first power plane from a power supply that includes a portable energy source, the first power plane being a component of a synchronous processor that includes a first processor core powered by the first power plane and a second processor core powered by a second power plane having a second power plane voltage.

14. The method of claim 12, wherein the decreasing a voltage received at a first power plane from a power supply that includes a portable energy source, the first power plane being a component of a synchronous circuit that includes a first subcircuit powered by the first power plane and a second subcircuit powered by a second power plane having a second power plane voltage further includes:

decreasing a voltage received at a first power plane from a power supply that includes a portable energy source, the first power plane being a component of a synchronous uniprocessor that includes a first subcircuit powered by the first power plane and a second subcircuit powered by a second power plane having a second power plane voltage.

15. The method of claim 12, wherein the detecting an incidence of a computational error occurring in the first subcircuit includes:

detecting an incidence of a computational error occurring in the first subcircuit with a hardware-implemented detector.

16. The method of claim 12, wherein the detecting an incidence of a computational error occurring in the first subcircuit includes:

detecting at least one incidence of a computational error corresponding to a setup/hold violation, a processor clock speed, a processor voltage, a noise spike, a charged particle, a soft error, a single event upset failure, an unreliable processor hardware, an incorrectly executed instruction, on-chip cache error, an oxide breakdown, an induced error, and/or an electromigration induced error occurring in the first subcircuit.

17. The method of claim 12, wherein the detecting an incidence of a computational error occurring in the first subcircuit includes:

detecting at least one of a single incidence, an incidence frequency, an incidence occurrence rate, an incidence tempo, an incidence pattern, and/or an incidence prevalence of a computational error occurring in the first subcircuit.

18. The method of claim 12, wherein the in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source includes:

in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source to a level that at least substantially minimizes the detected incidence of the computational error.

19. The method of claim 12, wherein the in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source includes:

in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source without substantially changing the second power plane voltage.

20. The method of claim 12, wherein the in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source includes:

in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source without a logically corresponding change in the second power plane voltage.

21. The method of claim 12, wherein the in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source includes:

in response to the detected computational error, increasing the voltage received at the first power plane from the power supply that includes a portable energy source, the portable energy source including at least one of a battery, a rechargeable battery, a replaceable battery, a fuel cell, an energy harvesting system, a capacitor, and/or a selectively removable portable electrical energy source.

22. An apparatus comprising:

means for decreasing a voltage received at a first power plane from a power supply that includes a portable energy source, the first power plane being a component of a synchronous circuit that includes a first subcircuit powered by the first power plane and a second subcircuit powered by a second power plane having a second power plane voltage;

means for detecting an incidence of a computational error occurring in the first subcircuit; and

means for increasing in response to the detected computational error the voltage received at the first power plane from the power supply that includes a portable energy source.