Method of providing electrical separation in intergrated devices and related device

• US 20070052018A1
• Filed: 07/31/2006
• Published: 03/08/2007
• Est. Priority Date: 08/15/2005
• Status: Active Grant

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies Fiber IP Singapore PTE Limited (Broadcom, Inc.)
• Inventors: Vallone, Marco, Agresti, Michele, Rigo, Cesara
• Granted Patent: US 7,498,613 B2
• Time in Patent Office: Days
• US Class Current: 257/344
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: H01S 5/0265 Intensity modulators intra-cavity modulators H01S5/0625
• CPC Class Codes: H01S 5/042 Electrical excitation ; Circuits therefor monolithically integrated laser drive components H01S5/0261

Abstract

An integrated device includes two sections, such as a DFB laser and an EAM modulator, having a semi-insulating separation region therebetween. The separation region is of a material acting as a trap on electrons and configured to impede current flow between the two sections due to holes. The separation region may be of a material acting as a trap both on electrons and holes. Alternatively, the separation region is of a material that acts as a trap on electrons and is provided over a p-type substrate common to the two sections.

Claims

1. A method of providing a semi-insulating separation region between two sections of an integrated device, the method comprising:

making said separation region of a material acting as a trap on electrons and configured to impede current flow between said sections due to holes.

2. The method of claim 1, further comprising:

making said separation region of a material acting as a trap both on electrons and holes.

3. The method of claim 1, further comprising:

making said separation region of a material that acts as a trap on electrons,

providing a p-type substrates common to said two sections, and

providing said separation region over said p-type substrate common to said two sections.

4. The method of claim 3, further comprising:

providing said separation region with a reversed structure starting from said p-type substrates and having an upper n-type cladding in which said sections are defined, whereby any residual current between said sections is due to electrons blocked by said semi-insulating separation region.

5. The method of claim 1, further comprising:

providing said separation region by using a material having deep acceptor levels acting as electron traps.

6. The method of claim 1, further comprising:

using for said separation region an iron-doped material.

7. The method of claim 1, further comprising:

using InGaAsP as a material for said separation region.

8. The method of claim 1, further comprising:

providing said separation region by using a material having deep level traps acting on both electrons and holes.

9. The method of claim 1, further comprising:

using AlGaInAs as a material for said separation region.

10. The method of claim 1, further comprising:

creating said separation region by;

etching a transition region between said two sections, and

depositing said material in said transition region to form said semi-insulating separation region.

11. The method of claim 1, wherein said semi-insulating separation region is butt-coupled to said two sections.

12. The method of claim 1, further comprising:

producing one of said two sections as a laser source.

13. The method of claim 12, wherein said laser source is a distributed feedback laser source.

14. The method of claim 13, further comprising:

defining a DFB grating over said one of said two sections.

15. The method of claim 1, further comprising:

producing one of said two sections as a modulator.

16. The method of claim 15, further comprising:

producing said one of said two sections as an EAM modulator.

17. An integrated device including two sections having a semi-insulating separation region therebetween, wherein said separation region is of a material acting as a trap on electrons and configured to impede current flow between said sections due to holes.

18. The device of claim 17, wherein said separation region is of a material acting as a trap both on electrons and holes.

19. The device of claim 17,

wherein said separation region is of a material that acts as a trap on electrons,

the device includes a p-type substrate common to said two sections, and

said separation region lies over said p-type substrates common to said two sections.

20. The device of claim 19, wherein said separation region has a reversed structure starting from said p-type substrate and having an upper n-type cladding in which said sections are defined, whereby any residual current between said sections is due to electrons blocked by said semi-insulating separation region.

21. The device of claim 17, wherein said separation region is of a material having deep acceptor levels as electron traps.

22. The device of claim 17, wherein said separation region is of an iron-doped material.

23. The device of claim 17, wherein said separation region includes InGaAsP as said material.

24. The device of claim 17, wherein said separation region is of a material having deep level traps acting on both electrons and holes.

25. The device of claim 17, wherein said separation region includes AlGaInAs as said material.

26. The device of claim 17, wherein said separation region is of material deposited in a transition region etched between said two sections.

27. The device of claim 17, wherein said semi-insulating separation region is butt-coupled to said two sections.

28. The device of claim 17, wherein one of said two sections is a laser source.

29. The device of claim 28, wherein said laser source is a distributed feedback laser source.

30. The device of claim 29, further comprising a DFB grating over said one of said two sections (A, B).

31. The device of claim 17, wherein one of said two sections is a modulator.

32. The device of claim 31, wherein said one of said two sections is an EAM modulator.