Digital-to-analog converter circuit
First Claim
1. A digital-to-analog converter circuit comprising:
- a plurality of capacitors each provided corresponding to each bit of digital data and having different capacitances from each other which are determined based on weights of the corresponding bits;
an output unit which outputs an analog voltage determined based on an amount of charge which is a total of charges charged to the plurality of capacitors and a total capacitance of the plurality of capacitors; and
a charge control transistor which is provided on a route of the digital data to each of the plurality of capacitors and controls supply of a voltage for each bit to the capacitor, wherein the transistor size of the charge control transistor is set corresponding to the capacitance of the capacitor to which the charge control transistor is connected.
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Abstract
Data of a zeroth bit is supplied via a charge control transistor for the zeroth bit to a corresponding capacitor, data of a first bit is supplied via a charge control transistor for the first bit to a corresponding capacitor, and data of a second bit is supplied via a charge control transistor for the second bit to a corresponding capacitor. The capacitors for the zeroth bit, first bit, and second bit have capacitances which are set in a ratio of 1:2:4 and capabilities of the corresponding charge control transistors for respective bits are set in a ratio of 1:2:4. With this structure, charging of capacitors corresponding to the bits can be performed under similar conditions.
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Citations
3 Claims
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1. A digital-to-analog converter circuit comprising:
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a plurality of capacitors each provided corresponding to each bit of digital data and having different capacitances from each other which are determined based on weights of the corresponding bits;
an output unit which outputs an analog voltage determined based on an amount of charge which is a total of charges charged to the plurality of capacitors and a total capacitance of the plurality of capacitors; and
a charge control transistor which is provided on a route of the digital data to each of the plurality of capacitors and controls supply of a voltage for each bit to the capacitor, wherein the transistor size of the charge control transistor is set corresponding to the capacitance of the capacitor to which the charge control transistor is connected. - View Dependent Claims (2, 3)
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Specification