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Multi-chip stack structure

  • US 20070054439A1
  • Filed: 07/12/2006
  • Published: 03/08/2007
  • Est. Priority Date: 07/14/2005
  • Status: Abandoned Application
First Claim
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1. A multi-chip stack structure comprising:

  • at least one first chip having an active surface and an opposed non-active surface, wherein the active surface is formed with a plurality of connecting pads thereon;

    a plurality of electrical contacts formed around the first chip;

    an insulating layer formed on the first chip and the electrical contacts, wherein the insulating layer is formed with a plurality of openings for exposing the connecting pads of the first chip and the electrical contacts;

    a plurality of redistributed circuit layers formed on the insulating layer, for electrically connecting the connecting pads of the first chip to the electrical contacts;

    at least one second chip directly mounted on the redistributed circuit layers, the second chip being electrically connected to the redistributed circuit layers in one of a flip-chip manner and a wire-bonding manner; and

    an encapsulant formed on the second chip, the insulating layer and the redistributed circuit layers, with the electrical contacts being exposed from the encapsulant.

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