Method of operating flash memory chips
First Claim
1. A method of operating a packaged flash memory device, the method comprising:
- sequentially applying a first command to perform an operation and a first address associated with the operation to N flash memory chips that are vertically arranged within the packaged flash memory device; and
thereafter determining whether or not a first flash memory chip has completed the operation;
if the operation is determined to have not been completed by the first memory chip, examining whether or not a second flash memory chip has completed the operation; and
if the operation is determined to have been completed by the first flash memory chip, examining whether or not the operation completed corresponds to a last page of the first flash memory chip.
1 Assignment
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Accused Products
Abstract
A method of operating a packaged flash memory module includes applying a first program or erase command and a first address associated with the first commend to a first flash memory chip of a plurality of flash memory chips that are arranged within the packaged flash memory module; applying a second program or erase command and a second address associated with the second commend to a second flash memory chip of the plurality of flash memory chips that are arranged within the packaged flash memory module, the second command being applied to the second flash memory chip prior to the completion of the first command by the first flash memory chip; and determining whether or not the first flash memory chip has completed the first command. If the first command is determined to have not been completed by the first memory chip, examining whether or not a second flash memory chip has completed the second command. If the first command is determined to have been completed by the first flash memory chip, examining whether or not the completed first command corresponds to a last page of the first flash memory chip.
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Citations
21 Claims
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1. A method of operating a packaged flash memory device, the method comprising:
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sequentially applying a first command to perform an operation and a first address associated with the operation to N flash memory chips that are vertically arranged within the packaged flash memory device; and
thereafter determining whether or not a first flash memory chip has completed the operation;
if the operation is determined to have not been completed by the first memory chip, examining whether or not a second flash memory chip has completed the operation; and
if the operation is determined to have been completed by the first flash memory chip, examining whether or not the operation completed corresponds to a last page of the first flash memory chip. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 19)
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13. A method of operating flash memory chips, the method comprising:
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(a) sequentially applying an operation command and an address to N flash memory chips stacked vertically;
(b) checking whether or not an operation corresponding to the operation command applied to a first flash memory chip has been completed, as a result of the check, if the operation of the first flash memory chip is determined not to have been completed, checking whether or not an operation corresponding to the operation command applied to a second flash memory chip has been completed, and as a result of the check, if the operation corresponding to the operation applied to the first flash memory chip is determined to have been completed, determining whether or not the operation has been completed corresponds to a last page of the first flash memory chip;
(c) as a result of the determination, if the operation completed by the first flash memory chip is determined to be the last page of the first flash memory chip, checking whether or not the operation corresponding to the operation command applied to the second flash memory chip has been completed, and as a result of the determination, if the operation completed by the first flash memory chip does not correspond to the last page of the first flash memory, applying another operating command and another address to the first flash memory chip, and then checking whether or not the operation has been completed by the second flash memory chip;
(d) if the operation has not been completed after checking an Nth flash memory chip by sequentially performing the steps (b) and (c), allowing the process to return to the step (b), and if the operation has been completed, determining whether or not the operation completed corresponds to a last page of the Nth flash memory chip; and
(e) as a result of the determination, if the operation completed corresponds to the last page of the Nth flash memory chip, returning to the step (b), and if the operation completed does not correspond to the last page of the Nth flash memory chip, applying another operating command and another address to the Nth flash memory chip, and then returning to the step (b). - View Dependent Claims (14, 15, 16, 17)
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18. A method of operating a packaged flash memory module, the method comprising:
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applying a first program or erase command and a first address associated with the first commend to a first flash memory chip of a plurality of flash memory chips that are arranged within the packaged flash memory module;
applying a second program or erase command and a second address associated with the second commend to a second flash memory chip of the plurality of flash memory chips that are arranged within the packaged flash memory module, the second command being applied to the second flash memory chip prior to the completion of the first command by the first flash memory chip; and
determining whether or not the first flash memory chip has completed the first command;
if the first command is determined to have not been completed by the first memory chip, examining whether or not a second flash memory chip has completed the second command; and
if the first command is determined to have been completed by the first flash memory chip, examining whether or not the completed first command corresponds to a last page of the first flash memory chip. - View Dependent Claims (20, 21)
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Specification