Mechanism for error handling of corrupted repeating primitives during frame reception

• US 20070061681A1
• Filed: 08/30/2005
• Published: 03/15/2007
• Est. Priority Date: 08/30/2005
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Carmichael, Richard
• Granted Patent: US 7,619,984 B2
• Time in Patent Office: Days
• US Class Current: 714/760
• CPC Class Codes: H04L 1/08 by repeating transmission, e.g. Verdan system H04L1/1858 and H04L1/189 take precedence
• CPC Class Codes: H04L 1/1829 Arrangements specially adapted for the receiver end
• CPC Class Codes: H04L 1/201 Frame classification, e.g. bad, good or erased frame indication per se H04L1/0082

Abstract

A method for error handling of corrupted repeating primitives during frame reception is disclosed. The method comprises identifying a portion of a received frame including a repeating primitive sequence, determining whether data in the repeating primitive sequence has one or more errors, and indicating a successful reception of the received frame with the one or more errors in the repeating primitive sequence if the number of errors is less than a determined threshold. Other embodiments are also disclosed.

Claims

1. A method, comprising:

identifying a repeating primitive sequence within a received frame;

determining whether data in the repeating primitive sequence has one or more errors; and

indicating a successful reception of the received frame with the one or more errors in the repeating primitive sequence if the number of errors is less than a determined threshold.

2. The method of claim 1, further comprising intervening to address the one or more errors if the number of the one or more errors exceeds the determined threshold.

3. The method of claim 2, wherein intervening to address the one or more errors further comprises:

abbreviating the received frame; and

flagging the one or more errors.

4. The method of claim 3, further comprising intervening to address the one or more errors if the one or more errors are a corrupted primitive control character.

5. The method of claim 1, wherein the received frame is transmitted using at least one of a Serial Advanced Technology Attachment (SATA) and a Serial Attached Small Computer Systems Interface (SAS) protocol.

6. The method of claim 5, wherein the determined threshold is three errors.

7. The method of claim 1, wherein the one or more errors are at least one of invalid data characters, improper data synchronization, and invalid encoding.

8. An apparatus comprising:

identification circuitry to identify a repeating primitive sequence within a received frame;

error checking circuitry to determine whether data in the repeating primitive sequence has one or more errors;

processing circuitry to;

process the repeating primitive sequence while ignoring the one or more errors if a number of the one or more errors is less than a determined threshold; and

process the repeating primitive sequence while addressing the one or more errors if the number of the one or more errors exceeds the determined threshold.

9. The apparatus of claim 8, wherein the received frame is received using at least one of a Serial Advanced Technology Attachment (SATA) and a Serial Attached Small Computer Systems Interface (SAS) protocol.

10. The apparatus of claim 9, wherein the determined threshold is three errors.

11. The apparatus of claim 8, wherein to process the repeating primitive sequence while ignoring the one or more errors further comprises indicating a successful reception of the received frame with the one or more errors.

12. The apparatus of claim 11, further comprising the processing circuitry to process the repeating primitive sequence by addressing the one or more errors if the one or more errors is a corrupted primitive control character.

13. A system, comprising:

a storage device; and

a host bus adapter (HBA), coupled to the storage device, having;

frame validation circuitry to;

identify a repeating primitive sequence within a received frame;

determine whether data in the repeating primitive sequence has one or more errors; and

indicate a successful reception of the received frame with the one or more errors in the repeating primitive sequence if the number of errors is less than a determined threshold.

14. The system of claim 13, wherein the frame validation circuitry further includes a receive processor to perform the identifying, the determining, and the indicating.

15. The system of claim 14, wherein the received frame is received using at least one of a Serial Advanced Technology Attachment (SATA) and a Serial Attached Small Computer Systems Interface (SAS) protocol.

16. The system of claim 13, wherein the determined threshold is three errors.

17. An article of manufacture comprising:

a machine-accessible medium including data that, when accessed by a machine, cause the machine to perform operations comprising;

identifying a repeating primitive sequence within a received frame;

determining whether data in the repeating primitive sequence has one or more errors; and

processing the repeating primitive sequence while ignoring the one or more errors if the number of errors is less than a determined threshold.

18. The article of manufacture of claim 17, wherein the machine-accessible medium further includes data that cause the machine to perform operations comprising intervening to address the one or more errors if the number of the one or more errors exceeds the determined threshold.

19. The article of manufacture of claim 18, wherein intervening to address the one or more errors further comprises:

abbreviating the received frame; and

flagging the one or more errors.

20. The article of manufacture of claim 19, further comprising intervening to address the one or more errors if a primitive following the data is corrupted.

21. The article of manufacture of claim 17, wherein the received frame is received using at least one of a Serial Advanced Technology Attachment (SATA) and a Serial Attached Small Computer Systems Interface (SAS) protocol.

22. The article of manufacture of claim 21, wherein the determined threshold is three errors.