A METHOD FOR FABRICATING A TUNING FORK GYROSCOPE

• US 20070062283A9
• Filed: 10/21/2004
• Published: 03/22/2007
• Est. Priority Date: 10/05/2001
• Status: Active Grant

• Current Assignee: Amy Duwel, Anthony Kourepenis, Christopher Lento, James Connelly, James Cousens, Jeffrey Borenstein, Marc Weinberg, William Sawyer
• Original Assignee: Amy Duwel, Anthony Kourepenis, Christopher Lento, James Connelly, James Cousens, Jeffrey Borenstein, Marc Weinberg, William Sawyer
• Inventors: Borenstein, Jeffrey, Duwel, Amy, Weinberg, Marc, Sawyer, William, Kourepenis, Anthony, Connelly, James, Lento, Christopher, Cousens, James
• Granted Patent: US 7,172,919 B2
• Time in Patent Office: Days
• US Class Current: 73/504.160
• CPC Class Codes: G01C 19/5719 using planar vibrating masses driven in a translation vibration along an axis
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/30105 Capacitance
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

A method for reducing errors in a tuning fork gyroscope includes determining a first distance, g_t, between an upper sense plate and a proof mass and a second distance, g_b, between a lower sense plate and the proof mass. The method further includes applying a first voltage, V_t, to the upper sense plate and a second voltage, V_b, to the lower sense plate, wherein the ratio of the first voltage and the second voltage is a function of the first distance and the second distance.

Claims

1. A method for reducing errors in a tuning fork gyroscope comprising:

determining a first distance, g_t, between an upper sense plate and a proof mass and a second distance, g_b, between a lower sense plate and the proof mass; and

applying a first voltage, V_t, to the upper sense plate and a second voltage, V_b, to the lower sense plate, wherein the ratio of the first voltage and the second voltage is a function of the first distance and the second distance.

2. The method for reducing errors of claim 1, wherein V_t/V_b=g_t³/g_b³.

3. The method for reducing errors of claim 1, wherein said first and second voltages are DC voltages.

4. The method for reducing errors of claim 1, wherein said first and second voltages are AC carrier excitation voltages.

5. The method for reducing errors of claim 1, wherein said step of determining said first distance is carried out by measuring the capacitance between the upper sense plate and the proof mass.

6. The method for reducing errors of claim 1, wherein said step of determining said second distance is carried out by measuring the capacitance between the lower sense plate and the proof mass.

7. A method for reducing errors in a tuning fork gyroscope including first and second proof masses, a left upper sense plate disposed over the first proof mass, a right upper sense plate disposed over the second proof mass, a left lower sense plate disposed under the first proof mass and a right lower sense plate disposed under the second proof mass, the method comprising:

measuring a first distance, g_tl, between the left upper sense plate and the first proof mass, measuring a second distance, g_tr, between the right upper sense plate and the second proof mass, measuring a third distance, g_bl, between the left lower sense plate and the first proof mass, and measuring a fourth distance, g_br, between the right lower sense plate and the second proof mass; and

applying a first voltage, V_tl, to the left upper sense plate, a second voltage, V_tr, to the right upper sense plate, a third voltage, V_bl, to the left lower sense plate, and a fourth voltage, V_br, to the lower right sense plate,

wherein the ratio of V_tl and V_bl is a function of g_tl and g_bl and the ratio of V_tr and V_br is a function of g_tr and g_br.

8. The method of claim 7 wherein V_tl is not equal to V_tr and V_bl is not equal to V_br, and wherein

$\frac{V_{\mathrm{tl}}}{V_{\mathrm{bl}}}=\frac{g_{\mathrm{tl}}^3}{g_{\mathrm{bl}}^3}$

 

⁢

and ⁢

 

⁢

V tr V br = g tr 3 g br 3 .

9. The method of claim 8 in which the voltages V_tr and V_bl are of opposite sign than the voltages V_tl and V_br.

10. A method for fabricating a tuning fork gyroscope with upper and lower sense plates, the method comprising:

providing a silicon substrate;

etching the silicon substrate to provide at least one recess in the silicon substrate;

producing a structure layer having a predetermined thickness;

etching the structure layer to provide at least one proof mass;

applying a metal coating to the silicon substrate beneath a portion of each proof mass;

providing a glass substrate;

etching the glass substrate to provide at least one recess in the glass substrate;

depositing a multimetal layer to the at least one recess;

electrostatically bonding the silicon substrate to the glass substrate; and

etching the silicon substrate down to the structure layer.

11. The method of claim 10 wherein the proof masses have a thickness in the range of 5 to 100 μ

m.

12. The method of claim 10 wherein the multimetal layer is chosen from the group consisting of Ti/Pt/Au and Ti/Pt.

13. The method of claim 10 in which producing a structure layer includes diffusing boron onto a surface of the silicon substrate.

14. The method of claim 13 in which diffusing boron onto a surface of the silicon substrate includes diffusing boron-geranium silicon to define structural thickness.

15. The method of claim 10 in which producing a structure layer includes growing epitaxial silicon with boron onto a surface of the silicon substrate to define structural thickness.

16. The method of claim 13 in which boron is diffused into a silicon substrate to define structural thickness.

17. The method of claim 13 including the further step of applying KOH thinning prior to etching the silicon substrate.

18. The method of claim 13 in which diffusing boron onto a surface of the silicon substrate includes diffusing silicon-on-insulator to define structural thickness.

19. The method of claim 10 wherein the silicon substrate includes a lightly doped layer and a highly doped epitaxial layer.

20. The method of claim 19 wherein the thickness of said highly doped epitaxial layer is between 5 and 100 μ

m thick.

21. The method of claim 10 wherein the etching of the silicon substrate is plasma enhanced ion etching.

22. The method of claim 10 wherein the structure layer is 5 to 100 μ

m thick.

23. The method of claim 10 wherein the structure layer is 5 to 20 μ

m thick.

24. The method of claim 10 wherein connecting posts between the silicon substrate and the glass substrate are defined by reactive ion etching.

25. The method of claim 10 wherein the recesses in the glass substrate are approximately 1700 Å

deep.

26. The method of claim 10 further including:

providing a second glass substrate;

etching said second glass substrate to provide at least one indentation in the second glass substrate;

depositing at least one metal run in said at least one indentation in the second glass substrate;

cutting a gap between said at least one proof mass and said second glass substrate;

exposing at least one bonding pad; and

bonding said second glass substrate to said structure layer.

27. The method of claim 10 wherein exposing at least one bonding pad includes water drilling.