Method of forming circuit pattern on printed circuit board

• US 20070062723A1
• Filed: 09/01/2006
• Published: 03/22/2007
• Est. Priority Date: 09/02/2005
• Status: Abandoned Application

• Current Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Original Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Inventors: Kim, Young-Jae, Joung, Jae-Woo, Yoo, Young-Seuck
• Application Number:
  US11/514,079
• Publication Number:
  US 20070062723A1
• Time in Patent Office: Days
• US Class Current: 174/255
• CPC Class Codes: H05K 1/0346 containing N
• CPC Class Codes: H05K 2201/0154 Polyimide
• CPC Class Codes: H05K 2201/09036 Recesses or grooves in insulating substrate
• CPC Class Codes: H05K 2203/013 Inkjet printing, e.g. for printing insulating material or resist
• CPC Class Codes: H05K 3/002 by liquid chemical etching
• CPC Class Codes: H05K 3/107 by filling grooves in the support with conductive material H05K3/045, H05K3/101, H05K3/1258 and H05K3/465 take precedence
• CPC Class Codes: H05K 3/1208 Pretreatment of the circuit board, e.g. modifying wetting properties; Patterning by using affinity patterns providing shape patterns H05K3/1258; adhesion treatments H05K3/38
• CPC Class Codes: H05K 3/125 by ink-jet printing
• CPC Class Codes: H05K 3/1258 by using a substrate provided with a shape pattern, e.g. grooves, banks, resist pattern

Abstract

A method of forming circuit patterns on a printed circuit board is disclosed. The method of forming circuit patterns on a printed circuit board comprising: (a) applying etchant on portions of an insulation substrate where the circuit patterns are to be formed, (b) curing the etchant by adjusting curing conditions, (c) applying metal ink on the etched circuit patterns, and (d) sintering the metal ink, allows a great reduction in production costs, since the processes of applying photoresist (PR), exposing, and developing can be eliminated to simplify the overall process, and the circuit patterns of printed circuit boards can be formed minutely and with precision with a fewer number of processes and less time.

Claims

1. A method of forming circuit patterns on a printed circuit board, the method comprising:

(a) applying etchant on portions of an insulation substrate where circuit patterns are to be formed;

(b) curing the etchant by adjusting curing conditions;

(c) applying metal ink in the etched circuit patterns; and

(d) sintering the metal ink.

2. The method of claim 1, wherein the operation (a) or the operation (c) is performed by inkjet printing.

3. The method of claim 1, wherein the insulation substrate is a polyimide substrate.

4. The method of claim 3, wherein the etchant is an etchant for polyimide resin.

5. The method of claim 1, wherein the sintering conditions comprise temperature and time.

6. The method of claim 1, wherein the metal ink comprises metal particles of 1 μ

m to 100 nm in size.

7. A printed circuit board comprising:

an insulation substrate;

a trench formed on a surface of the insulation substrate in correspondence with a portion where a circuit pattern is to be formed; and

a conductive layer filled in the trench and forming the circuit pattern,

wherein the trench is formed by etching, and the conductive layer is formed by sintering metal ink.

8. The printed circuit board of claim 7, wherein the trench is formed by printing etchant on the insulation substrate by inkjet printing and afterwards curing the etchant by adjusting curing conditions.

9. The printed circuit board of claim 7, wherein the conductive layer is formed by filling metal ink in the trench by inkjet printing and afterwards drying and sintering.

10. The printed circuit board of claim 7, wherein the insulation substrate is a polyimide substrate.

11. The printed circuit board of claim 10, wherein the etchant is an etchant for polyimide resin.

12. The printed circuit board of claim 7, wherein the metal ink comprises metal particles of 1 nm to 100 nm in size.

13. The printed circuit board of claim 7, wherein the depth of the trench is greater than or equal to 10 μ

m and lower than or equal to the thickness of the insulation substrate.