Flip chip semiconductor device and process of its manufacture

• US 20070063316A1
• Filed: 09/20/2006
• Published: 03/22/2007
• Est. Priority Date: 09/22/2005
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Ma, Ling
• Granted Patent: US 8,154,105 B2
• Time in Patent Office: Days
• US Class Current: 257/621
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/7809 having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

A semiconductor die and method of making it are provided. The die includes a first via extending through the entire thickness of the die and a first via electrode disposed inside the via electrically connecting an electrode at a top surface of the die with another electrode disposed at a bottom surface of the die.

Claims

1. A semiconductor die comprising:

a first via extending through an entire depth of the die; and

a first via electrode disposed inside the via electrically connecting a power electrode disposed on a top surface of the die with another power electrode disposed on a bottom surface of the die.

2. The die of claim 1, wherein the die is a flip chip MOSFET less than 200 micrometers in depth.

3. The die of claim 1, further comprising at least one additional via identical to the first via and at least one additional via electrode identical to the first via electrode.

4. The die of claim 1, wherein the another power electrode extends along the entire bottom surface of the die.

5. The die of claim 4, wherein the pad electrically connects the first via electrode and the at least one additional via electrode.

6. The die of claim 1, further comprising at least one of an oxide material, a nitride material or a copper material disposed inside the via, such that the via electrode is closer to a side wall of the via than the at least one material.

7. The die of claim 1, wherein the via is disposed outside the termination region of the die.

8. A process of making a thin flip chip die, the process comprising:

defining an area for a trench;

etching the die to a depth less than the entire die thickness;

forming a metal via electrode in the trench;

grinding the die to a final thickness to at least the depth of the trench;

forming at a top surface of the die a drain pad electrically connected to the metal via electrode and forming a back metal at a bottom surface of the die electrically connected to the metal via electrode.

9. The process of claim 8, further comprising adding at least one of an oxide material, a nitride material or a copper material inside the trench to a region farther from side walls of the trench than the via electrode.

10. The process of claim 8, wherein the process comprises forming at least one additional trench and depositing in the trench an additional via electrode electrically connected to the drain pad.

11. The process of claim 8, further comprising forming a solder resist passivation over the drain pad.

12. The process of claim 8, wherein the grinding comprises grinding the die such that the die has a thickness less than 200 micrometers.

13. The process of claim 8, wherein the die is a vertical conduction flip chip MOSFET.

14. The process of claim 8, wherein the grinding comprises grinding the die such that the die has a thickness less than 50 micrometers.