Series regulator and differential amplifier circuit thereof

• US 20070063686A1
• Filed: 03/20/2006
• Published: 03/22/2007
• Est. Priority Date: 05/16/2005
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Device Technology Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Yamada, Kouhei
• Granted Patent: US 7,492,137 B2
• Time in Patent Office: Days
• US Class Current: 323/314
• CPC Class Codes: G05F 1/565 sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor G05F1/563 takes precedence

Abstract

A series regulator for supplying a stable output voltage to a load has a differential amplifier circuit and an output stage. The output stage has an output control transistor that supplies the output voltage in accordance with a control signal, and a voltage divider circuit that divides the output voltage and outputs the divided voltage. The differential input stage includes a differential pair (source-coupled pair) of two NMOS transistors, an NMOS transistor, and a current mirror circuit formed by PMOS transistors. The differential input stage detects a differential voltage between a reference voltage and the divided voltage output from the voltage divider circuit. The differential amplifier circuit also has an amplification stage including a PMOS transistor that has a resistor connected between its gate and drain and that has its drain connected to a node, and an NMOS transistor that supplies a current proportional to a constant current to the PMOS transistor. The series regulator/differential amplifier circuit allows both low output resistance and sufficient DC gain without increasing bias current.

Claims

1. A series regulator for supplying a stable output voltage to a load, the series regulator comprising:

an output control transistor that supplies the output voltage in accordance with a control signal;

a voltage divider circuit that divides the output voltage and outputs the divided voltage; and

a differential amplifier circuit that outputs the control signal to the output control transistor in accordance with a differential voltage of difference between a preset reference voltage and the divided voltage output from the voltage divider circuit,

wherein the differential amplifier circuit includes;

a differential input stage for detecting the differential voltage between the reference voltage and the divided voltage output from the voltage divider circuit; and

an amplification stage having a MOS transistor and a resistor having a predetermined resistance connected to the gate and the drain of the MOS transistor, and a constant-current circuit connected in series with the MOS transistor,

wherein the differential input stage has an output connected to the gate of the MOS transistor, and

wherein a connecting part between the MOS transistor and the constant-current circuit serves as an output terminal of the amplification stage.

2. The series regulator according to claim 1, wherein the differential input stage includes a pair of MOS transistors, with the sources thereof coupled together, and wherein the reference voltage and the divided voltage output from the voltage divider circuit are input to the respective gates of the pair of MOS transistors to detect the differential voltage therebetween.

3. A differential amplifier circuit for outputting a differential signal, comprising:

a differential input stage for detecting a differential voltage between two voltage sources; and

an amplification stage having a MOS transistor and a resistor having a predetermined resistance connected to the gate and the drain of the MOS transistor, and a constant-current circuit connected in series with the MOS transistor,

wherein the differential input stage has an output connected to the gate of the MOS transistor, and

wherein a connecting part between the MOS transistor and the constant-current circuit serves as an output terminal of the amplification stage.

4. The differential amplifier circuit according to claim 3, wherein the differential input stage includes a pair of MOS transistors, with the sources thereof coupled together, and wherein the two voltage sources are input to the respective gates of the pair of MOS transistors to detect the differential voltage therebetween.