Power Management in Digital Receivers

• US 20070064839A1
• Filed: 05/02/2006
• Published: 03/22/2007
• Est. Priority Date: 05/03/2005
• Status: Active Grant

• Current Assignee: CSR Technology Incorporated (Qualcomm, Inc.)
• Original Assignee: SIRF Technology Incorporated (Qualcomm, Inc.)
• Inventors: Luu, Howard
• Granted Patent: US 7,555,661 B2
• Time in Patent Office: Days
• US Class Current: 375/340
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0075 Transmission of coding parameters to receiver H04L1/0023 takes precedence
• CPC Class Codes: H04L 1/203 Details of error rate determination, e.g. BER, FER or WER
• CPC Class Codes: H04L 27/2601 Multicarrier modulation systems
• CPC Class Codes: H04N 21/42607 for processing the incoming bitstream
• CPC Class Codes: H04N 21/4436 Power management, e.g. shutting down unused components of the receiver power management in computer systems G06F1/3203; hibernate or awake process in computer systems G06F9/4418

Abstract

Methods and systems consistent with the present invention provide a method for dynamically controlling power consumption in a digital demodulator circuit by varying clock rates and bit widths of demodulator components including an analog to digital converter, decimation filter, OFDM operating engine, FEC decoder, and MPE-FEC processor, according to parameters and conditions of the received signal including modulation mode, signal to noise ratio, effective bit transmission rate, bit error rate, packet error rate, adjacent channel interference, and co-channel interference.

Claims

1. A method for managing power in a receiver that receives a signal from a transmitter, comprising determining minimum acceptable values of one or more operating parameters of one or more of a plurality of components of a demodulator of the receiver according to an operating mode of the transmitter as determined by the demodulator and a characteristic of a received signal from the transmitter;

and adjusting one or more of the operating parameter of the one or more components to the minimum acceptable values of the operating parameters.

2. The method according to claim 1, wherein the one or more components comprise a multi-rate filter, an OFDM engine, a forward error correcting (FEC) decoder, and a multi-protocol encapsulation-forward error correction (MPE-FEC) processor.

3. The method according to claim 1, wherein the operating mode comprises one of 2K/4K/8K mode, QPSK, 16-QAM, 64-QAM, hierarchy modulation, in-depth VS native de-interleaving, and convolution code rate.

4. The method according to claim 1, wherein the characteristic of the received signal comprises one of a signal-to-noise ratio, an error rate, an interference level, and an effective bit transmission rate.

5. The method according to claim 4, wherein the error rate comprises one of a bit error rate and a packet error rate.

6. The method according to claim 4, wherein the interference comprises one of an adjacent channel interference and a co-channel interference.

7. The method according to claim 1, wherein the one or more operating parameters comprise one or more of a clock rate and a bit width.

8. The method according to claim 1, wherein the component comprises an analog-to-digital converter.

9. The method according to claim 8, wherein the operating parameter comprises one of a bit-width and a sampling rate.

10. The method according to claim 9, further comprising the step of modifying an operating mode of a multi-rate filter in response to adjusting the operating parameter.

11. A method for managing power in a receiver that receives a signal from a transmitter, wherein the receiver includes a demodulator comprising a plurality of components, the method comprising the steps of:

determining an operating mode of the transmitter;

determining a minimum operating parameter of one of the plurality of components, wherein the minimum operating parameter is based on the operating mode; and

adjusting an operating parameter of the component to the minimum operating parameter.

12. The method according to claim 11, wherein the component comprises one of a multi-rate filter, an OFDM engine, a forward error correcting (FEC) decoder, and a multi-protocol encapsulation-forward error correction (MPE-FEC) processor.

13. The method according to claim 11, wherein the operating mode comprises one of 2K/4K/8K mode, QPSK, 16-QAM, 64-QAM, hierarchy modulation, in-depth VS native de-interleaving, and convolutional code rate.

14. The method according to claim 11, wherein the operating parameter comprises one of a clock rate and a bit width.

15. The method according to claim 11, wherein the component comprises an analog-to-digital converter.

16. The method according to claim 15, wherein the operating parameter comprises one of a bit-width and a sampling rate.

17. The method according to claim 16, further comprising the step of modifying an operating mode of a dynamic multi-rate filter in response to adjusting the operating parameter.

18. A method for managing power in a receiver that receives a signal from a transmitter, wherein the receiver includes a demodulator comprising a plurality of components, the method comprising the steps of:

measuring a characteristic of the signal;

determining a minimum operating parameter of one of the plurality of components, wherein the minimum operating parameter is based on the characteristic; and

adjusting an operating parameter of the component to the minimum operating parameter.

19. The method according to claim 18, wherein the component comprises one of a multi-rate filter, an OFDM engine, a forward error correcting (FEC) decoder, and a multi-protocol encapsulation-forward error correction (MPE-FEC) processor.

20. The method according to claim 18, wherein the characteristic comprises one of a signal-to-noise ratio, an error rate, an interference level, and an effective bit transmission rate.

21. The method according to claim 20, wherein the error rate comprises one of a bit error rate and a packet error rate.

22. The method according to claim 20, wherein the interference comprises one of an adjacent channel interference and a co-channel interference.

23. The method according to claim 18, wherein the operating parameter comprises one of a clock rate and a bit width.

24. The method according to claim 18, wherein the component comprises an analog-to-digital converter.

25. The method according to claim 24, wherein the operating parameter comprises one of a bit-width and a sampling rate.

26. The method according to claim 25, further comprising the step of modifying an operating mode of a dynamic multi-rate filter in response to adjusting the operating parameter.