Computer system and I/O bridge

• US 20070067432A1
• Filed: 07/21/2006
• Published: 03/22/2007
• Est. Priority Date: 09/21/2005
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Tarui, Toshiaki, Yasuda, Yoshiko
• Granted Patent: US 8,095,701 B2
• Time in Patent Office: Days
• US Class Current: 709/223
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence

Abstract

A computer system reduces an overhead by using an I/O switch high in versatility when realizing the sharing of an I/O between virtual computers. The system includes a CPU module #0 having plural CPU cores, an AS bridge 15 connected to the CPU cores, and a main memory that can be accessed from the CPU cores or the AS bridge 15, and AS switches SW0 and SW1 that connect the AS bridge 15 of the CPU module #0 and an I/O blade #5. The CPU module #0 has a hypervisor that divides the plural CPU cores and the main memory into plural logical partitions, and the AS bridge 15 adds virtual path information set in each of the logical partitions and path information of from the AS bridge 15 to the I/O blade #5 to the path information of the AS packet to switch over the AS packet between each of the logical partitions and the I/O blade #5 when relaying the AS packet transmitted or received between the logical partitions and the I/O blade #5.

Claims

1. A computer system, comprising:

a CPU module including a plurality of CPU cores, an I/O bridge that is connected to the CPU cores, and a main memory that can be accessed from the CPU cores and the I/O bridge; and

an I/O switch that connects the I/O bridge of the CPU module to an I/O module,

wherein the CPU module includes a firmware that divides the plurality of CPU cores and the main memory into a plurality of logical partitions, and

wherein the I/O bridge includes a virtual switch that sets virtual path information that is determined according to each of the logical partitions and path information from the I/O bridge to the I/O module to path information of the I/O access information, and switches over the I/O access information with respect to the I/O module in each of the logical partitions when relaying the I/O access information that is transmitted or received between the logical partitions and the I/O module.

2. The computer system according to claim 1, wherein the virtual switch comprises:

a path information setting unit that adds the virtual path information of each of the logical partitions to the path information of the I/O access information which is transmitted from the logical partition to the I/O module as the path information of the virtual switch, and transmits the path information of the virtual switch to the I/O switch;

a destination extracting unit that extracts the virtual path information of the virtual switch from the path information that is included in the I/O access information received from the I/O module; and

a destination logical partition identifying unit that identifies the logical partition corresponding to the extracted virtual path information to transfer the I/O access information to the logical partition.

3. The computer system according to claim 1, wherein the virtual switch comprises:

an address managing unit that stores a base address and a size of a region on the main memory to which the logical partition is allocated in association with the logical partition therein;

a command extracting unit that extracts a command that is included in the I/O access information received from the I/O module;

an address converting unit that acquires the base address and the size corresponding to the logical partition from the address managing unit, and adds the base address to the DMA address that is included in the DMA command when the extracted command is DMA; and

a DMA processing unit that conducts DMA access directly to the address of the main memory which is indicated by the addition result when the addition result does not exceed the region on the main memory which is allocated to the logical partition indicated by the size.

4. The computer system according to claim 1, wherein the virtual switch comprises:

a command extracting unit that extracts a command that is included in the I/O access information received from the I/O module; and

an event writing unit that notifies the firmware of an event with the logical partition corresponding to the virtual path information as an address when the extracted command is the event,

wherein the firmware notifies the logical partition corresponding to the virtual path information of the notified event.

5. The computer system according to claim 1, wherein the virtual switch comprises:

an address managing unit that stores a base address and a size of a region on the main memory to which the logical partition is allocated in association with the logical partition therein;

a destination logical partition setting unit for controlling write due to the multicast in each of the logical partitions;

a command extracting unit that extracts a command that is included in the I/O access information received from the I/O module;

an address converting unit that acquires the base address and the size corresponding to the logical partition from the address managing unit, and adds the base address to the DMA address that is included in the multicast DMA command in each of the logical partitions when the extracted command is a multicast DMA;

a DMA processing unit that conducts DMA access to the address of the main memory which corresponds to the logical partition indicated by the addition result, respectively, when the addition result does not exceed the region on the main memory which is allocated to the logical partition indicated by the size; and

a multiple-write processing unit that conducts write with respect to all of the logical partitions which are destinations of the multicast.

6. The computer system according to claim 1, wherein the virtual switch comprises:

a target logical partition setting unit for controlling an event due to the multicast in each of the logical partitions;

a command extracting unit that extracts a command that is included in the I/O access information received from the I/O module; and

a multicast event notifying unit that sets a target logical partition number to the target logical partition setting unit, and notifies the firmware of an event that is included in a multicast event when the extracted command is the multicast event,

wherein the firmware notifies the plural logical partitions based on setting of the target logical partition setting unit of the notified event.

7. The computer system according to claim 1, wherein the CPU blade includes an initializing unit that sets the maximum number of logical partitions which can be produced to the CPU blade at the time of initializing the CPU blade.

8. The computer system according to claim 1, wherein the virtual switch includes a plurality of virtual ports that are set in each of the logical partitions, and wherein the firmware includes a virtual switch initializing unit that allocates the virtual ports to the logical partitions at the time of producing the logical partitions.

9. The computer system according to claim 1, wherein the virtual switch comprises:

a plurality of virtual ports that are set in each of the logical partitions; and

a logical partition managing unit that manages a correspondence between the logical partitions and the virtual ports and the states of the logical partitions,

wherein the firmware updates the state of the logical partition managing unit at the time of producing or deleting the logical partition.

10. The computer system according to claim 1, wherein the I/O switch connects a plurality of CPU blades and a plurality of I/O modules,

wherein the computer system includes a fabric managing device that manages the allocation state of the I/O module with respect to the plurality of logical partitions that are set in the CPU module, and

wherein the fabric managing device allocates one of the I/O modules to the plurality of logical partitions or the plurality of CPU modules,

11. An I/O bridge that connects a plurality of logical partitions into which a plurality of CPU cores and a main memory are divided by firmware to an I/O switch, and conducts an I/O access between an I/O module that is connected to the I/O switch and the logical partitions,

wherein the I/O bridge includes a virtual switch that adds virtual path information that is set in each of the logical partitions to the path information of the I/O access information, and switches over the I/O access information between each of the logical partitions and the I/O module at the time of relaying I/O access information that is transmitted or received between the logical partitions and the I/O module.

12. The I/O bridge according to claim 11, wherein the virtual switch comprises:

an originator identifying unit that identifies the logical partition that issues the I/O access information upon receiving the I/O access information from the logical partition; and

a path information setting unit that adds the virtual path information of the virtual switch corresponding to the logical partition to the I/O access information, and transmits the added information to the I/O switch.

13. The I/O bridge according to claim 12, wherein the virtual switch includes an address managing unit that stores the base address and the size of a region on a main memory to which the logical partition is allocated in association with the logical partition therein, and

wherein the originator identifying unit retrieves the address managing unit by a given bit of the address information of the logical partitions which is extracted from the I/O access information, and acquires the logical partition corresponding to the address information to identify the logical partition.

14. The I/O bridge according to claim 13, wherein the virtual switch comprises:

a plurality of virtual ports that are set in each of the logical partitions; and

a logical partition managing unit that manages a correspondence between the logical partitions and the virtual ports, and states of the logical partitions, and

wherein the path information setting unit acquires the virtual port corresponding to the logical partition from the logical partition managing unit, and sets the path information to the virtual port that is connected with the I/O switch from the virtual port as the virtual path information.

15. The I/O bridge according to claim 11, wherein the virtual switch comprises:

a destination extracting unit that extracts the virtual path information of the virtual switch from the path information which is included in the I/O access information received from the I/O module; and

a destination logical partition identifying unit that identifies the logical partition corresponding to the extracted virtual path information to transfer the I/O access information to the logical partition.

16. The I/O bridge according to claim 15, wherein the virtual switch comprises:

an address managing unit that stores a base address and a size of a region on the main memory to which the logical partition is allocated in association with the logical partition therein;

a command extracting unit that extracts a command that is included in the I/O access information received from the I/O module;

an address converting unit that acquires the base address and the size corresponding to the logical partition from the address managing unit, and adds the base address to the DMA address that is included in the DMA command when the extracted command is DMA; and

a DMA processing unit that conducts DMA access directly to the address of the main memory which is indicated by the addition result when the addition result does not exceed the region on the main memory which is allocated to the logical partition indicated by the size.

17. The I/O bridge according to claim 15, wherein the virtual switch comprises:

a command extracting unit that extracts a command that is included in the I/O access information received from the I/O module; and

an event writing unit that notifies the firmware of an event with the logical partition corresponding to the virtual path information as an address when the extracted command is the event.

18. The I/O bridge according to claim 15, wherein the virtual switch comprises:

an address managing unit that stores a base address and a size of a region on the main memory to which the logical partition is allocated in association with the logical partition therein;

a destination logical partition setting unit for controlling write due to the multicast in each of the logical partitions;

a command extracting unit that extracts a command that is included in the I/O access information received from the I/O module;

an address converting unit that acquires the base address and the size corresponding to the logical partition from the address managing unit, and adds the base address to the DMA address that is included in the multicast DMA command in each of the logical partitions when the extracted command is a multicast DMA;

a DMA processing unit that conducts DMA access to the address of the main memory which corresponds to the logical partition indicated by the addition result, respectively, when the addition result does not exceed the region on the main memory which is allocated to the logical partition indicated by the size; and

a multiple-write processing unit that conducts write with respect to all of the logical partitions which are destinations of the multicast.

19. The I/O bridge according to claim 15, wherein the virtual switch comprises:

a target logical partition setting unit for controlling an event due to the multicast in each of the logical partitions;

a command extracting unit that extracts a command that is included in the I/O access information received from the I/O module; and

a multicast event notifying unit that sets a target logical partition number to the target logical partition setting unit, and notifies the firmware of an event that is included in a multicast event when the extracted command is the multicast event.