Booting multiple processors with a single flash ROM

• US 20070067614A1
• Filed: 09/20/2005
• Published: 03/22/2007
• Est. Priority Date: 09/20/2005
• Status: Abandoned Application

• Current Assignee: Diana R. Gerhardt
• Original Assignee: Diana R. Gerhardt
• Inventors: Criscolo, Michael, Berry, Robert, Saunders, Michael, Conley, Christopher
• Application Number:
  US11/230,335
• Publication Number:
  US 20070067614A1
• Time in Patent Office: Days
• US Class Current: 713/1
• CPC Class Codes: G06F 8/60 Software deployment
• CPC Class Codes: G06F 9/4405 Initialisation of multiprocessor systems
• CPC Class Codes: H04L 67/34 involving the movement of software or configuration parameters network booting or remote initial program loading [RIPL] G06F9/4416

Abstract

A method, apparatus and computer-usable medium are presented for loading firmware onto multiple processors. A firmware controller is coupled to multiple processors and a firmware memory. A service processor, by controlling the operation of the firmware controller, selects one or more of the multiple processors. Under the control of the service processor, the firmware controller sends firmware from the firmware memory to each of the selected processors, either sequentially or simultaneously. If one of the selected processors fails to fully execute the firmware from the firmware memory, the firmware controller notifies the service processor of that failure as well as the particular memory address in the firmware where the failure occurred.

Claims

1. A system for loading firmware onto multiple processors, the system comprising:

a firmware controller;

multiple processors coupled to the firmware controller; and

a single dedicated memory coupled to the firmware controller, the single dedicated memory being loaded with a firmware used to boot a processor prior to loading an operating system, wherein the firmware controller selectively sends, during an initial boot process, the firmware to a receiving processor that is selected from the multiple processors, and wherein execution of the firmware occurs in the receiving processor without a copy of the firmware being stored in the receiving processor.

2. The system of claim 1, wherein the firmware controller contains means for, in response to a processor failing to execute the firmware, determining a memory address of code at which point execution of the firmware became hung.

3. The system of claim 1, wherein the multiple processors are physically on a first server blade, the system further comprising:

means for, in response to one of the multiple processors failing to fully execute the firmware, conscripting a processor from another server blade to replace a processor on the first server blade that failed to fully execute the firmware.

4. The system of claim 1, further comprising:

means for, in response to one of the multiple processors failing to fully execute the firmware, conscripting a processor from the server blade to replace a processor on the server blade that failed to fully execute the firmware.

5. The system of claim 1, wherein operations of the firmware controller are controlled by a service processor.

6. The system of claim 1, further comprising:

a dedicated bus that is used exclusively for data communication between the multiple processors and the dedicated memory that is loaded with the firmware.

7. A method for loading firmware onto multiple processors, the method comprising:

coupling a firmware controller to multiple processors;

coupling a dedicated memory that is loaded with firmware to the firmware controller;

selecting one or more of the multiple processors to be selected processors; and

directly executing the firmware in the selected processors, wherein the firmware is executed by each selected processor without storing a copy of the firmware in each selected processor.

8. The method of claim 7, further comprising:

in response to a selected processor failing to execute the firmware, determining a memory address at which point the selected processor failed to continue executing the firmware.

9. The method of claim 7, wherein the multiple processors are physically on a first server blade, the method further comprising:

in response to one of the selected processors failing to fully execute the firmware, conscripting a processor from another server blade to replace the selected processor, on the first server blade, that failed to fully execute the firmware.

10. The method of claim 7, further comprising:

in response to one of the selected processors failing to fully execute the firmware, conscripting a backup processor from the multiple processors to replace the selected processor that failed to fully execute the firmware.

11. The method of claim 7, wherein the firmware is supplied to all of the selected processors at a same time.

12. The method of claim 7, further comprising:

communicating data, between the multiple processors and the dedicated memory that is loaded with the firmware, via a dedicated bus that is used exclusively for data communication between the multiple processors and the dedicated memory that is loaded with the firmware.

13. A computer-usable medium containing computer program code, the computer program code comprising computer executable instructions configured to load firmware onto multiple processors, wherein the multiple processors are coupled to a firmware controller, and wherein the firmware controller is coupled to a dedicated memory that is loaded with firmware, and wherein the computer executable instructions are configured to perform a method comprising:

selecting one or more of the multiple processors to be selected processors; and

directly executing the firmware in the selected processors, wherein the firmware is executed by each selected processor without storing a copy of the firmware in each selected processor.

14. The computer-useable medium of claim 13, wherein the method further comprises:

in response to a selected processor failing to execute the firmware, determining a memory address at which point the selected processor failed to continue executing the firmware.

15. The computer-useable medium of claim 13, wherein the multiple processors are physically on a first server blade, and wherein the method further comprises:

in response to one of the selected processors failing to fully execute the firmware, conscripting a processor from another server blade to replace the selected processor, on the first server blade, that failed to fully execute the firmware.

16. The computer-useable medium of claim 13, wherein the method further comprises:

in response to one of the selected processors failing to fully execute the firmware, conscripting a backup processor from the multiple processors to replace the selected processor that failed to fully execute the firmware.

17. The computer-useable medium of claim 13, wherein the method further comprises:

controlling operations of the firmware controller by using software that is deployed from a remotely located third party service provider.

18. The computer-useable medium of claim 13, wherein the method further comprises:

communicating data between the multiple processors and the dedicated memory that is loaded with the firmware via a dedicated bus that is used exclusively for data communication between the multiple processors and the dedicated memory that is loaded with the firmware.

19. The computer-useable medium of claim 13, wherein the computer executable instructions are deployable to a client computer from a server at a remote location.

20. The computer-useable medium of claim 13, wherein the computer executable instructions are provided by a service provider to a customer on an on-demand basis.