Fast pre-charge circuit and method of providing same for memory devices
First Claim
1. A pre-charge circuit for an integrated circuit memory device, comprising:
- an address calculating unit to detect a loading of said integrated circuit memory device;
and a driver to provide a voltage to said loading of said integrated circuit memory device based on an output of said address calculating unit.
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Abstract
A fast pre-charge circuit and method of providing a fast pre-charge for an integrated circuit memory device is disclosed. The fast pre-charge circuit comprises an address calculating unit and a multi-power driver. The address calculating unit detects the sector distance from driver of the integrated circuit memory device, and the driver provides a voltage to the loading of the integrated circuit memory device based on an output of the address calculating unit. Unlike a conventional fixed-power wordline driver, the driver of the present invention provides multiple voltage levels to the wordline or dynamically adjusts for different loading situations.
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Citations
34 Claims
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1. A pre-charge circuit for an integrated circuit memory device, comprising:
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an address calculating unit to detect a loading of said integrated circuit memory device;
and a driver to provide a voltage to said loading of said integrated circuit memory device based on an output of said address calculating unit. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of providing a power to a pre-charge circuit for an integrated circuit memory device, comprising the steps of:
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decoding an address of a line to be provided said power;
detecting a loading of said line; and
providing a voltage to said line based on said loading. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16)
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17. A method of providing a power to a pre-charge circuit for an integrated circuit memory device, comprising the steps of:
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decoding an address of a wordline to be provided said power;
detecting a loading of said wordline; and
providing a voltage to said wordline based on said loading. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25)
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26. A method of providing a power to a pre-charge circuit for an integrated circuit memory device, comprising the steps of:
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decoding an address of a bitline to be provided said power;
detecting a loading of said bitline; and
providing a voltage to said bitline based on said loading. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33, 34)
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Specification