Method and apparatus for preamble synchronization in wireless radio frequency identification (RFID) systems

• US 20070071036A1
• Filed: 09/26/2005
• Published: 03/29/2007
• Est. Priority Date: 09/26/2005
• Status: Abandoned Application

• Current Assignee: Symbol Technologies, Inc. (Zebra Technologies Corporation)
• Original Assignee: Symbol Technologies, Inc. (Zebra Technologies Corporation)
• Inventors: Okunev, Yuri, Maizenberg, Valery
• Application Number:
  US11/234,417
• Publication Number:
  US 20070071036A1
• Time in Patent Office: Days
• US Class Current: 370/503
• CPC Class Codes: H04L 7/042 Detectors therefor, e.g. correlators, state machines digital correlators in general G06F17/15

Abstract

The present invention provides methods and apparatuses for detection of a preamble portion of a data packet. A plurality of samples are received in an input signal. Samples that occur between consecutive sign changes in the received plurality of samples are counted. The counting of samples is performed a number of times to produce a sequence of counts of samples between consecutive sign changes in the received plurality of samples. Matched filtering of the sequence of counts of samples is performed to determine whether a preamble is detected. Bit rate and timing are initialized for data decoding based on parameters of the sequence of sample counts of a detected preamble.

Claims

1. A method for detecting a preamble portion of a signal, comprising:

(a) receiving a plurality of samples in an input signal;

(b) counting samples that occur between consecutive sign changes in the received plurality of samples;

(c) performing step (b) a number of times to produce a sequence of counts of samples between consecutive sign changes in the received plurality of samples; and

(d) performing matched filtering of the sequence of counts of samples to determine whether a preamble is detected.

2. The method of claim 1, wherein the input signal comprises FM0 encoded data and a number Z of sign changes for an expected FM0 preamble is selected to be a value equal to 7 or 31, wherein step (c) comprises:

performing step (b) the selected value of Z times.

3. The method of claim 1, wherein the input signal comprises Miller encoded data and a number Z of sign changes for an expected Miller preamble is selected to be a value equal to 36, 76, 84, 156, 172, or 348, wherein step (c) comprises:

performing step (b) the selected value of Z times.

4. The method of claim 1, wherein the sequence of sample counts has a length of N sample counts, and if it is determined that a preamble is not detected in step (d):

(e) repeating step (b) to produce an additional count of samples between a last sign change and a next sign change in the received plurality of samples; and

(f) repeating step (d) using the additional count of samples and the previous N-1 counts of samples as the sequence of N sample counts to determine whether a preamble is detected.

5. The method of claim 1, wherein if it is determined that a preamble is not detected in step (f):

repeating steps (e) and (f) until a preamble is detected or an expected time interval for preamble detection is ended.

6. The method of claim 1, further comprising:

(e) estimating a data rate and a timing for data decoding if a preamble is detected.

7. A method for detecting a preamble portion of a signal, comprising:

(a) receiving an in-phase signal component of an input signal having a first plurality of samples;

(b) counting samples that occur between consecutive sign changes in the received first plurality of samples;

(c) performing step (b) a number N of times to produce a first sequence of counts of samples between consecutive sign changes in the received first plurality of samples;

(d) performing matched filtering of the first sequence of counts of samples to generate a first preamble detection indication for the in-phase signal component;

(e) receiving a quadrature-phase signal component of the input signal having a second plurality of samples;

(f) counting samples that occur between consecutive sign changes in the received second plurality of samples;

(g) performing step (f) the number N of times to produce a second sequence of counts of samples between consecutive sign changes in the received second plurality of samples; and

(h) performing matched filtering of the second sequence of N counts of samples to generate a second preamble detection indication for the quadrature-phase signal component.

8. The method of claim 7, further comprising:

(i) processing the first and second preamble detection indications to determine whether a preamble is detected for the input signal.

9. The method of claim 8, wherein step (i) comprises:

performing a logical OR function of the first and second preamble detection indications to determine whether a preamble is detected for the input signal.

10. The method of claim 8, further comprising:

(j) selecting at least one of the in-phase signal component and quadrature-phase signal component for further processing based on the first and second preamble detection indications.

11. The method of claim 8, further comprising:

(j) using an estimate of a data rate and a timing from the in-phase signal component for data decoding if the first preamble detection indication indicates that a preamble is detected.

12. The method of claim 8, further comprising:

(j) using an estimate of a data rate and a timing from the quadrature-phase signal component for data decoding if the second preamble detection indication indicates that a preamble is detected.

13. The method of claim 8, further comprising:

(j) receiving an estimate of a first data rate and a first timing from the in-phase signal component;

(k) receiving an estimate of a second data rate and a second timing from the quadrature-phase signal component;

(l) combining the first data rate and the second data rate to determine a data rate for data decoding; and

(m) combining the first timing and the second timing to determine timing for data decoding.

14. The method of claim 7, further comprising:

(i) determining whether the in-phase signal component or the quadrature-phase signal component has a higher signal level; and

(j) using the one of the in-phase signal component or the quadrature-phase signal component having the higher signal level for estimation of bit rate and timing for data decoding.

15. The method of claim 7, further comprising:

(i) if a preamble is detected, indicating a start of data at a first sample following the detected preamble.

16. The method of claim 8, further comprising:

(j) initializing data symbol timing based on a characteristic of a detected preamble.

17. A system in a receiver for detecting a preamble portion of a signal, comprising:

a counter that counts samples that occur between consecutive sign changes in a plurality of samples received on an input signal;

a matched filter that includes a shift register of N registers, wherein an input register of the shift registers is coupled to an output of the counter, wherein the N registers store a sequence of N sample counts received from the counter;

N gates that are coupled to the N registers, wherein each gate of the N gates determines whether a sample count of a corresponding register of the N registers is within a predetermined range; and

a logical AND that receives an output determination signal from each gate and generates a preamble detection indication.

18. The system of claim 17, further comprising:

an estimator that estimates a number of samples in a symbol interval based on the N samples counts and a number of symbols in a detected preamble.

19. The system of claim 18, wherein the estimator comprises:

a summer that sums the N sample counts stored in the N registers; and

a divider that divides the summed sample count by the number of symbols in the preamble to generate the estimate of the number of samples in a symbol interval.

20. The system of claim 17, further comprising:

a timing module that receives the preamble detection indication and the output of the counter, and determines a first sample of a first data symbol following a detected preamble.

21. The system of claim 17, wherein the receiver is included in a radio frequency identification (RFID) reader.

22. The system of claim 17, wherein N≦

a number of sign changes in an expected preamble.

23. A system in a receiver for detecting a preamble portion of a signal, comprising:

a first counter that counts samples that occur between consecutive sign changes in a plurality of samples received on an in-phase signal component of an input signal;

a first matched filter that includes a first shift register having N registers, wherein an input register of the first shift register is coupled to an output of the first counter, wherein the N registers of the first shift register store a first sequence of N samples counts received from the first counter;

a first N gates that are coupled to the N registers of the first shift register, wherein each gate of the first N gates determines whether a sample count of a corresponding register of the N registers of the first shift register is within a predetermined range;

a first logical AND that receives a determination signal from each gate of the first N gates and generates a first preamble detection indication;

a second counter that counts samples that occur between consecutive sign changes in a plurality of samples received on an quadrature-phase signal component of the input signal;

a second matched filter that includes a second shift register having N registers, wherein an input register of the second shift register is coupled to an output of the second counter, wherein the N registers of the second shift register store a second sequence of N samples counts received from the second counter;

a second N gates that are coupled to the N registers of the second shift register, wherein each gate of the second N gates determines whether a sample count of a corresponding register of the N registers of the second shift register is within a predetermined range; and

a second logical AND that receives a determination signal from each gate of the second N gates and generates a second preamble detection indication.

24. The system of claim 23, further comprising:

a first estimator that generates a first estimation of a number of samples in a symbol interval based on the N samples counts stored in the first shift register and a number of symbols of a preamble; and

a second estimator that generates a second estimation of a number of samples in a symbol interval based on the N samples counts stored in the second shift register and a number of symbols of the preamble.

25. The system of claim 24, further comprising:

a first timing module that receives the first preamble detection indication and the output of the first counter, and generates a first determination of a first sample of a first data symbol following a detected preamble; and

a second timing module that receives the second preamble detection indication and the output of the second counter, and generates a second determination of the first sample of the first data symbol following the detected preamble.

26. The system of claim 25, further comprising:

a combiner that receives the first and second preamble detection indications, the first and second estimations, and the first and second determinations of the first sample, and initializes data symbol timing and determines a data symbol duration.

27. The system of claim 23, wherein the receiver is included in a radio frequency identification (RFID) reader.

28. The system of claim 23, wherein N≦

a number of sign changes in an expected preamble.